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Challenging Traditional Cellphone Chip Test Philosophies

Costs are pushing more and more functions onto a single chip. In the RF world, this manifests itself as more and more digital and mixed signal components showing up on what were traditionally RFICs. Edwin Lowery of Agilent Technologies discusses how the different RF and mixed-signal test traditions should be merged...
In today's high volume manufacturing of cellular transceivers, cost of test is paramount. With more and more integration of mixed signal and radio frequency (RF) components onto the same die, traditional test philosophies are increasingly challenged. Should a highly integrated transceiver be considered as a series of blocks that need to be tested individually? Or would it make more sense to treat the whole die as a radio?

Mixed signal engineering techniques tend to treat the chip as a series of blocks and RF engineering techniques as a radio. The optimal test flow lies somewhere in between. Tradeoffs need to be made between treating a system on chip (SOC) as a radio and as a series of functional blocks. Both approaches have their merits.

Digital radio receivers

In the consumer cellular market, it is well established that digital radios can save a lot of battery power as well as conserve precious and finite frequency bandwidth (Figure 1). For a generic digital radio, entire spectrum available to the antenna arrives at the preselecting filter. This filter limits the spectrum to a few specific frequencies, namely the RX or receiver band of the cell phone. This very low amplitude input channel is boosted in power by a low noise amplifier (LNA). The signal is then down converted through the first mixer, and then further filtered to ensure that only one RX channel gets through. What remains is a single RX channel that needs to be demodulated. This single channel is split into its in-phase (I) and quadrature (Q) components by using two additional mixers. The local oscillators (LOs) for these mixers are offset by a 90° phase separation. The baseband signals are then filtered another time and digitised.

Fig.1: Superhet digital radio block diagram

In this example, most of the components described are traditional RF system blocks. The only mixed signal blocks are the baseband filter and the analogue to digital converters (ADCs). In fact, RF engineers typically get their test signals directly from the baseband filters and perform their analysis from there.

In the semiconductor test world, things are a bit different. The block diagram changes a bit, which has a huge impact on the test list and test methodology. There is no preselecting filter or baseband ADC. Consider a real world example of a block diagram for a Code Division Multiple Access (CDMA) receiver that supports the Advanced Mobile Phone Services (AMPS) and Personal Communications Service (PCS) standards (Figure 2). This architecture is a zero intermediate frequency (ZIF) design. This means that there is a single LO and hence a single down conversion used for the device. In this case, the entire RX input band is incident on the first LNA and then taken off-chip for further band pass filtering. The signal is then sent through an automatic gain control amplifier (AGC). This AGC amplifies the signal so that it can be detected by the demodulator circuit. Next the signal is directly down converted so that its centre frequency is at 0Hz (hence zero IF). The 90° phase shifter block from the LO causes the incoming signal to be demodulated and broken down into its corresponding I and Q components. Finally the signal is sent through a final low pass filter and buffer before being sent off chip.

Fig.2: CDMA/AMPS receiver block diagram

A few new components are visible in this block diagram as well. Notice there are two digital to analogue converters (DACs) at the I and Q buffers. In ZIF architectures, converting a signal from RF to baseband will inevitably have a DC component. If the component is too high, the signal needed will not be detectable. These two DACs will compensate for the DC component and make sure the signal stays around 0V. Also notice that the AGC block needs some sort of control to manage the level of amplification for the receiver. These kinds of DAC blocks are quite common for mixed signal test engineers, but may be new for RF test engineers.

Figure 3 shows a ZIF receiver designed to work in the Global System for Mobile (GSM) communications band. From a block diagram point of view, this is very similar to the CDMA chip, except that it works at two different bands. This is why it has two LNA's before the AGC. Each LNA is tuned for either the Digital Cellular System (DCS) or GSM frequency band. Also, it is not necessary to have off chip filtering as GSM adjacent channel filtering is less rigorous. Note that a voltage controlled oscillator (VCO) is integrated right onto the chip. This adds more complexity to the chip test list. The device is described as a DCS, GSM850, GSM and PCS compatible receiver. It is also specified as being EDGE ready.

Fig.3: GSM/DCS receiver block diagram

Table 1 summarises basic specifications for some common cellular handset standards.

Table 1: Key parameters for


Mixed signal vs. RF, production vs. characterisation

The main difference between RF engineers and mixed signal engineers is that RF engineers do a frequency conversion before digitising. RF engineers also play more tricks with incident and reflective waves by using reflectometers. For this discussion though, the device under test (DUT) acts as the frequency translator and the digitising is done using traditional mixed signal techniques. Therefore, all RF blocks will be treated as cascaded RF elements, and the mixed signal blocks will be tested with mixed signal techniques. For consistency, keep in mind that dBm for a 50Ω system is defined as:

dBm = 10log[((vout)2/50)/1mW]

This is an absolute measurement of signal level compared with 1mW. All baseband power and gain measurements need to be converted to this unit for consistency with other radio specifications.

Traditionally, test engineers start with a very complete test program and then simply remove some of the tests when production starts. As the product matures, additional tests are removed until a final test flow is achieved - a process that can take years. Looking at the different modes of operation, there is a strong temptation to test all permutations of types of modulation, frequencies and channels. There is also a great deal of pressure from designers to add additional tests for their “pet” module.

Test engineers should strongly resist the pressure to put all these tests into the production flow. Keep in mind that each device should be characterised before going into production and characterisation should be as complete as possible. For production, however, the main goal is to determine that the DUT is good and that it functions. It is not necessary to characterise every device that ships from the test floor. However, understanding the need to minimise risk, there is a very easy way to get the best of both worlds.

One approach could be to minimise the test flow at the beginning of the ramp up and characterise every Nth device (Figure 4) putting all results into a datalog. This approach allows a much faster production test time and still gives visibility into overall device performance. This keeps track of production corners and lowers costs. N is increased as the product matures, reducing test time. It is extremely important to reduce the production tests needed to show that the DUT is working and meets specifications.

Fig.4: Alternative production flow

Block by block

The best way to reduce the production test list is to start by analysing each DUT block in terms of the kinds of measurements required. Once all blocks are understood, the tests are then cascaded together to come up with a complete test list, which covers all of the individual blocks. These tests have to cover the essential features of the blocks for the amplifiers, mixers, demodulators, baseband filters and VCOs.

For amplifiers, the primary measurements of interest are gain, noise figure, impedance match, saturation/compression, flatness across channel and intermodulation distortion. For a DUT, impedance match of internally connected amplifiers is probably not necessary or even possible to measure. If there were a problem with the impedance match of an internal node, it presumably would certainly show up in some other measurement such as the gain, flatness or noise figure.

On top of these linear effects, it is also crucial to measure non-linear effects on the incident signals. Figure 5 shows the most popular non-linear measurement - intermodulation distortion. The idea is that when two signals are applied to the DUT, more than these two signals appear at the output. If the two frequencies are very close to each other, it turns out that two intermodulation products will also be nearby.

Fig.5: In band intermodulation products

An interesting property of these signals is that when the fundamentals 1dB increase at the input, they increase 1dB at the output while the intermodulation products grow 3dB. These two lines can be plotted on an input vs. output chart and the intersection point found (Figure 6) to give the third order intercept (TOI).

Fig.6: Third order intercept

In measuring mixers, the primary interest is in, gain noise figure, impedance match, RF to IF isolation, LO to IF isolation and LO to RF isolation (Figure 7). A mixer takes an input RF signal and translates it up and down in the frequency domain by the equation. In radio design, either the lower or upper IF bandwidth is filtered out (Figure 8).

Fig.7 Mixer isolation paths

Fig.8: Mixer output products

The good news for the test engineer is that some of these concepts are easy to cascade. Gain and noise figure for an amplifier coupled with a mixer, can be combined into one measurement. In other words for both of these blocks combined, one measurement can be made to qualify both blocks. Once again, impedance match of an internal node is not so crucial to measure as problems usually show up in gain or noise figure data.

In ZIF designs, demodulation (Figure 9) occurs by taking an LO frequency and shifting it by 90°. This signal is then applied to two different mixers. The resultant demodulation becomes highly dependent on extremely accurate phase separation between the two mixers, and how accurately the gain of the I and Q paths are matched. These characteristics are described by phase and amplitude mismatches.

Fig.9: ZIF demodulator

The theory behind how this works is based on the idea that information can be sent over the RF link by instantaneously varying the amplitude and phase of the signal. For thorough testing of the device, phase mismatch of the demodulator across the entire operating band of the channel must be measured. In practice, a few points are measured and linearity is assumed between the points. Also, the gain of the I and Q signals must be identical. This is measured by sending in a single tone and checking the amplitude difference between the I and Q outputs.

For the baseband anti-aliasing filter, the measurements of interest are amplitude ripple per channel, phase response per channel, 3dB rolloff and cumulated inter symbol interference (ISI). Amplitude ripple is measured by looking over the entire operating channel and finding variation in the pass band. This can be measured at the same time as amplitude mismatch is made. The same idea applies to phase response per channel.

A major figure of merit for filters is the frequency point at which the amplitude drops by 3dB. This can be time consuming to find. One approach might be to take several data points and then interpolate to find exactly where the 3dB point occurs. This 3dB point is known as the operating bandwidth of the device.

Fig.12: Amplitude ripple and 3dB rolloff

Even ideal filters affect the incident signals in some way (Figure 13). If the signal is spread too far in the time domain, ISI is created. Beyond the 3dB cutoff frequency, the ISI is the ultimate goal of any baseband filter measurement. If ISI is too high, the device will not be able to demodulate the signal properly.

For the VCO blocks, major interests are output power, frequency range, voltage vs. frequency response and phase noise.

Fig.16: Constellation plots for GSM (left) and EDGE (right)

Radio approach

In the block-by-block approach, the signals used on the DUT were limited to discrete carrier waves (CWs) at the input and output of the device. In the real world, this is never the case. Once the DUT is installed in a phone, it is only given complex signals with coherent messages. Modulated signals are measured in terms of error vector magnitude (EVM), quantifying modulation quality. EVM indicates how several radio blocks act and interact. If a modulated signal is applied to the receiver and a plot made of the I and Q plane, the result is referred to as a constellation plot. Figures 16 and 17 are constellation plots for GSM and EDGE modulation respectively. GSM is a constant amplitude modulation and appears as a circle with discrete points. EDGE is much more complex and appears as a series of dots on the I-Q plane. EVM is the magnitude of error that the measured signal has as compared to the ideal constellation plot. Since this is a dynamic measurement, it contains both amplitude and time components.

By using EVM, the DUT is no longer being treated as a series of blocks. Now the DUT is being treated as a system. The benefit here is that one test can replace several other discrete tone tests.

In order for a demodulator to pass a complex demodulation test, the phase and amplitude balance have to be correct across the entire operating band. Also, there has to be very little ISI (Figure 13). What this means is that by using EVM to test the demodulator, all of the amplitude/phase imbalance tests, and all of the filter tests can be replaced with a single EVM measurement. This can greatly reduce the test list. Of course, for the EVM measurement to be accurate, very good test instrumentation linearity is required and an extremely robust demodulation algorithm must be available.

CDMA modulation uses quadrature phase shift keying modulation (QPSK). Figure 18 shows QPSK modulation with various filter slopes. This is intended to demonstrate the effect of defective filters on the EVM constellation plot.

For GSM, the test list can be reduced from the order of 32 elements for a block-by-block approach to 18 elements. The CDMA test list can be cut from 25 to 11 measurements. This does not reduce test coverage - EVM provides the entire phase and amplitude response across the entire operating band and not just at three discrete points as for the block-by-block approach. It could easily be argued that test coverage is significantly improved.

Fig.18: CDMA's QPSK modulation with various filter slopes


This article is based on previously published material © 2003 IEEE. Reprinted, with permission, from International Electronics Manufacturing Technology (IEMT) Semicon West 2003 Publication ID 03CH37479C, ISBN 0-7803-7934-9


1. “Testing and Troubleshooting Digital RF Communication Receiver Designs”, Agilent Technologies Application Note 1314 pp 3-6

2. “Modern Solutions for Testing RF Communication Amplifiers”, Hewlett Packard, 1995 RF and Microwave Design Test Seminar. pp 35-40

3. “Measuring EDGE Signals-New and Modified Techniques and Measurement Requirements” Agilent Technologies Application Note 1361 pp 4-12

4. “Digital Modulation in Communication Systems- An Introduction” Agilent Technologies Application Note 1298 pp 12-25

5 “Understanding GSM/EDGE Transmitter and Receiver Measurments for Base Transceiver Stations and Their Components” Agilent Technologies Application Note 1312 pp 30-33

This article is based on material first published in the proceedings of the 2003 IEEE/CPMT/SEMI International Electronics Manufacturing Technology Symposium.

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