News Article

ACM Research Highlights WLP Processing Equipment For OSAT Customers


ACM Research, a supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications, as highlighted the availability of its extended portfolio of wet wafer processing tools designed to meet the advanced technology requirements of outsourced semiconductor assembly and test (OSAT) providers. ACM's suite of customized, high-end wet wafer processing systems supports advanced WLP processes such as copper (Cu) pillar and gold (Au) bumping, as well as through silicon via (TSV), fan-out and chiplet processes. Tool capabilities span the entire process flow, including cleaning, coating, developing, plating, planarizing, photoresist (PR) stripping and etching.

“Today's wafer-level packages are more complex than those of previous generations and require wet-processing tools with innovative technologies to meet or exceed customers' criteria,” said David Wang, ACM's Chief Executive Officer and President. “Since 2012, we have worked in collaboration with our OSAT customers to customize our advanced systems to their specific requirements. They have deployed ACM's wet wafer solutions for both standard and high-density fan-out processes in high volumes, and have reported favorable results including high yields and increased throughput.”

According to Yole Développement, a market research and technology analysis firm:

• the market size of the global advanced packaging industry was $29 billion in 2019 and is expected to grow at a compound annual growth rate (CAGR) of 6.6% to reach $42 billion in 2025; and

• advanced packaging as a percentage of the total semiconductor packaging market is expected to increase from 42.6% in 2019 to 49.4% in 2025 due to strong momentum in advanced packaging capabilities resulting from the slowing of Moore's Law, heterogeneous integration, and continued demand for innovation from new applications such as 5G, artificial intelligence (AI), high performance computing (HPC) and the Internet of things (IoT).1

ACM Research's wet wafer processing systems for WLP are compatible with both 200mm and 300mm wafers, and can be implemented for the following applications:

• Electrochemical plating (ECP): ACM's ECP ap system with self-developed second anode technology achieves within less than 5% wafer uniformity, less than 3% wafer-to-wafer uniformity, less than 2% repeatability and less than 2.0µm within die coplanarity. The system can be configured with up to three load ports, up to four vacuum pre-wet chambers, up to 20 plating chambers and up to four post-clean chambers. ACM's ECP tool is easily customized to suit customer requirements for critical WLP plating steps, including Cu, nickel (Ni), Sn/Sn-Ag pillar, solder bump, Au bump and Cu redistribution layer applications. Additionally, due to ACM's proprietary diffusion plate and patented rubber seal, the tools are well suited for fan-out, TSV and through-mold via processing.

• Stress-free polishing (SFP): ACM's SFP system is based on an electrochemical reaction mechanism. It is ideal for removing excess copper and the top barrier layer without inducing mechanical stress. Chemical mechanical polishing, wet-etch and dry-etch processes can be integrated into ACM's SFP system. Electrolyte and wet-etchant chemistries are recycled and reused in real time, reducing the amount of slurry usage by more than 80% in CMP processes.

• Coater: ACM's coating system performs crucial steps for WLP lithography processes, such as photoresist and polyimide coating, soft bake, and the application of hexamethyldisilazane (HMDS) for vapor deposition. The system can achieve precise edge barrier removal using innovative methods and precise coating controls. Configurations are highly customizable, with options including: up to four coating chambers with ACM's unique auto-clean function; one or two of a wide variety of different photoresist nozzles; eight to 14 hot plates; two to four cold plates; and one or two HMDS auto-clean chambers. The ACM proprietary in situ auto-clean technology in the coating chamber can reduce tool preventive maintenance times, especially in the coating process for photo resist with high thicknesses, even above 100µm.

• Developer: ACM's developer system is designed for post-exposure bake, developing and hard-baking capabilities. Its flexibility allows for the use of three PR development methods, as well as double-sided processes. The system can be configured with up to four sets of developing chambers, each containing one to five liquid nozzle sets. Customers can also choose from two to 14 hot plates and from two to four cold plates.

• Wet etcher: ACM's wet etching system uses various chemicals to remove excess under-bump metallization from wafers. Its smart-sequence recipe function makes it possible to combine metal etch processes, such as Cu and titanium (Ti) etch. These can be performed in one system as a scheduled sequence. Systems can be customized with four or eight single-wafer etch chambers, can handle the delivery of up to five chemistries, and can effect double-sided processing and reclamation of two chemistries.

• Photoresist strip: Designed for high-efficiency PR stripping, ACM's wet stripping system combines bench-soaking and single-spin PR removal processes in one tool, which features an integrated tank and four single-wafer chambers. First, wafers are soaked in the solvent tank, which holds multiple wafers at one time for increased throughput. Next, the wafers are transferred to the single-wafer module, where resist chemistry is sprayed on the wafer as it spins, for greater wafer control. Single-strip chambers perform double-sided processes and are designed to reclaim two chemistries. Space Alternated Phase Shift (SAPS) Megasonic assisted residual removal in the single-strip chamber is also available for the critical stripping process in order to enhance product yields.

• Scrubber: ACM's scrubber system was designed to achieve high particle-removal efficiency for both integrated chip manufacturing and WLP using multiple clean methods. High-pressure deionized water is mixed with carbon dioxide (CO2) to create dual-fluid spray cleaning that combines both liquid and gas phase chemistries. Additionally, soft brushes allow for the removal of different-sized particles. The system can also be configured with ACM's proprietary SAPS megasonic cleaning technology and a wafer-flipping function that allows for double-sided cleaning. The scrubber system is compatible with silicon and glass substrate materials, as well as bonded wafers. A four-chamber scrubber system can achieve high throughputs of 100 wafers per hour.

ACM has demonstrated success with volume shipments to leading OSAT customers for each of its wet wafer process tools for WLP applications. For more information, please call the ACM regional company contact listed below.

AngelTech Live III: Join us on 12 April 2021!

AngelTech Live III will be broadcast on 12 April 2021, 10am BST, rebroadcast on 14 April (10am CTT) and 16 April (10am PST) and will feature online versions of the market-leading physical events: CS International and PIC International PLUS a brand new Silicon Semiconductor International Track!

Thanks to the great diversity of the semiconductor industry, we are always chasing new markets and developing a range of exciting technologies.

2021 is no different. Over the last few months interest in deep-UV LEDs has rocketed, due to its capability to disinfect and sanitise areas and combat Covid-19. We shall consider a roadmap for this device, along with technologies for boosting its output.

We shall also look at microLEDs, a display with many wonderful attributes, identifying processes for handling the mass transfer of tiny emitters that hold the key to commercialisation of this technology.

We shall also discuss electrification of transportation, underpinned by wide bandgap power electronics and supported by blue lasers that are ideal for processing copper.

Additional areas we will cover include the development of GaN ICs, to improve the reach of power electronics; the great strides that have been made with gallium oxide; and a look at new materials, such as cubic GaN and AlScN.

Having attracted 1500 delegates over the last 2 online summits, the 3rd event promises to be even bigger and better – with 3 interactive sessions over 1 day and will once again prove to be a key event across the semiconductor and photonic integrated circuits calendar.

So make sure you sign up today and discover the latest cutting edge developments across the compound semiconductor and integrated photonics value chain.


GOODFELLOW Confirms Membership In The BSI UK Graphene Group
Siemens And ASE Enable Next-generation High Density Advanced Package Designs
TEL Introduces Episode UL As The Next Generation Etch Platform
Belgian Initiative For AI Lung Scan Analysis In Fight Against COVID-19 Goes European
ASML Reports €14.0 Billion Net Sales
Tescan And 3D-Micromac Collaborate To Increase The Efficiency Of Failure Analysis Workflows
K-Space Offers A New Accessory For Their In Situ Metrology Tools
Tower Semiconductor Announced Program Creating An Integrated-Laser-on-Silicon Photonics Foundry Process
Onto Innovation Announces New Inspection Platform
Obducat Receives Order For Fully Automated Resist Processing Tool From A Customer In Asia
Imec Demonstrates 20nm Pitch Line/Space Resist Imaging With High-NA EUV Interference Lithography
South Korean Point Engineering Chooses ClassOne’s Solstice S8 For Advanced Semiconductor Plating
SUSS MicroTec Opens New Production Facility In Taiwan
EV Group Establishes State-of-the-art Customer Training Facility
Can New Advances In CMOS Replace SCMOS Sensors In Biomedical Applications?
Changes In The Management Board Of 3D-Micromac AG
Panasonic Microelectronics Web Seminar
New Plant To Manufacture Graphene Electronics
ITRI And DuPont Inaugurate Semiconductor Materials Lab
Cadence Announces $5M Endowment To Advance Research
DISCO's Completion Of New Building At Nagano Works Chino Plant
Will Future Soldiers Be Made Of Semiconductor?
AP&S Expands Management At Beginning Of 2021
U.S. Department Of Defense Partners With GLOBALFOUNDRIES To Manufacture Secure Chips At Fab 8

Search the news archive

To close this popup you can press escape or click the close icon.
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.

Please subscribe me to:


You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in:
{taasPodcastNotification} Array
Live Event