News Article
New energy efficient transistor architecture challenges size and power barriers
Infineon researchers have unveiled details of a new transistor architecture in Japan that removes many of the barriers to the production of smaller, more powerful electronic devices and circuits.
Infineon researchers have unveiled details of a new transistor architecture in Japan that removes many of the barriers to the production of smaller, more powerful electronic devices and circuits.Known as multi-gate field-effect transistor technology, these transistors are part of Infineon's energy-efficiency performance goals. Integrated multi-gate transistors can offer compared to today's 65nm transistors a more than 10 times reduction in off current and a 50% reduction in transistor switching power. Infineon's researcher have demonstrated a first in integrating multi-gate transistors with enhanced high-k gate dielectrics and metal gate in highly complex digital circuits with record switching speed, leakage power and switching power efficiency. Developers of highly integrated circuits, who frequently have to accommodate several million components in a space the size of a pinhead, face a number of challenges: They need to pack more functionality into a product while keeping its dimensions as small as possible and its power consumption to a minimum. Technologically, though, these goals conflict with one another: Smaller transistor dimensions and higher operating frequencies require more power, and this means higher leakage power consumption when circuits are inactive and in stand-by mode and higher switching or active power when circuits are in the operating mode. Unlike today's commonly used two-dimensional, planar standard technology, multi-gate field-effect transistors are three-dimensional. Infineon has completed primary tests with the new transistor architecture in 65nm technology on complex digital circuits with more than 23,000 transistors that incorporate all of the key components used in today's advanced integrated circuits, and SRAM. With the shortest switching times ever measured with this type of architecture – at 13.9 picoseconds, an improvement of 40 percent – compared to previous results the circuit sets a new record. Even light can only cover a distance of close to four millimetres in that time. "We have measured a quiescent current that is a factor 10 lower than in today's integrated circuits. That doubles the energy efficiency and battery life of mobile devices," said Prof. Dr. Hermann Eul, Member of the Infineon Management Board and head of the Communication Solutions business group, commenting on the findings. "These efforts give us high confidence that the integration of multi-gate transistors combined with our leading know how about applications will result in cost-effective solutions and power sensitive applications, extending battery life for consumers using mobile devices substantially. And the new architecture will make it possible that user can watch videos all the way through to the end on portable devices." Active multimedia like games and videos need high processing speeds, but they also cause power consumption to increase rapidly. In some cases, this can drain device batteries in less than an hour, to the disappointment of users. At the same time, stand-by power consumption in today's mobile phones can increase threefold if the ambient temperature rises sharply – when installed in a car holder, for example. Infineon's new architecture prevents this and radically improves the energy efficiency. Batteries would last twice as long during active operation, and in stand-by mode the digital baseband processor would consume 10 times less power. Infineon has taken a new direction to ensure that transistors switch on and off reliably and to keep power requirements to an essential minimum: The standard transistor architecture, which has been flat (planar) for the past 50 years, is now being designed in three dimensions. The gate electrode of the transistor surrounds the current-carrying silicon channel on several sides (multi-gates), doubling the contact surface used to switch off the transistor more efficiently. Infineon will continue to explore the new manufacturing process, which could be ready for use as a basic technology in mass production sometimes beyond the 32nm technology node, partially in connection with its participation in the core partner program at IMEC (Interuniversity Micro Electronics Centre, Leuven, Belgium).
