SÜSS Presents Latest Technology On Packaging & 3DIC
SÜSS MicroTec hosted a technology forum in Asia that focused on the latest developments in Advanced Packaging, Materials, Manufacturing technologies and market trends in 3DIC and Wafer Level Packaging.
The event took place on three separate dates at three main industry centres in Singapore, followed by the events in Hsinchu, and Shanghai.
Yole Développement's Taiwan CTO, Pascal Viaud, moderated the events and presented Yole's latest analysis on 3D TSV technologies and 3D market trends.
He said, "It was a pleasure to moderate this great event. The Forum gathered leading companies from across the industry as well as world-renowned research institutes sharing insights and exchanging experience. Especially with 2013 being expected to be the key turning point for the true 3DIC technology implementation in significant volume, the forum attendees were eager to hear all about the latest developments and advances from the experts.'
OSAT (Outsourced Assembly and Test) STATS ChipPAC as well as the research institutes ITRI (Industrial Technology Research Institute) and SIMIT (Shanghai Institute of Microsystem and Information Technology) shared an overview of their current status on the development of 3D Integration.
Most speakers of the forum focused on topics such as thin wafer processing.
SÜSS MicroTec presented latest achievements and developments in temporary wafer bonding and debonding,
"Semiconductor mid-end processing technologies like 3D Integration and Advanced Packaging are gaining importance and have come into the strategic focus of many global players. We hosted the Asia Technology Forum to present our solutions and discuss the remaining technological challenges with customers and cooperation partners", said Frank P. Averdung, President and CEO of SUSS MicroTec.
"Understanding the obstacles and applying this knowledge to the development of next generation production solutions is prerequisite for the industry's success," added Averdung.
The Forum featured representatives from Industrial Technology Research Institute, Shanghai Institute of Microsystem and Information Technology, STATS ChipPAC, Yole Développement, Fraunhofer IZM Berlin, GenISys, HD MicroSystems, Brewer Science and PVA TePla.
