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Memory Jumps Hurdles With Silicon Oxide

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Embedded diodes boost Rice University invention's potential as a robust and roomy memory


A Rice University lab that uses cheap, plentiful silicon oxide to store data has developed memory devices that show the technology's practicality.

The team led by Rice chemist James Tour has built a 1-kilobit rewritable silicon oxide device with diodes that eliminate data-corrupting crosstalk.

Postdoctoral researcher Gunuk Wang, left, and chemist James Tour. (Credit: Jeff Fitlow/Rice University)

A paper on the new work appears this week in the journal Advanced Materials.

With gigabytes of flash memory becoming steadily cheaper, a 1k nonvolatile memory unit has little practical use. But as a proof of concept, the chip shows it should be possible to surpass the limitations of flash memory in packing density, energy consumption per bit and switching speed.

The technique is based on an earlier discovery by the Tour lab. The researchers found that when electricity passes through a layer of silicon oxide, it strips away oxygen molecules and creates a channel of pure metallic phase silicon that is less than five nanometres wide.

Normal operating voltages can repeatedly break and "heal" the channel, which can be read as either a "1" or "0" depending upon whether it is broken or intact.

The circuits require only two terminals instead of three, as in most memory chips. The crossbar memories built by the Rice lab are flexible, resist heat and radiation and show promise for stacking in three-dimensional arrays.

Rudimentary silicon memories made in the Tour lab are now aboard the International Space Station, where they are being tested for their ability to hold a pattern when exposed to radiation.

The diodes eliminate crosstalk inherent in crossbar structures by keeping the electronic state on a cell from leaking into adjacent cells, Tour said. "It wasn't easy to develop, but it's now very easy to make," he says.

The device built by Rice postdoctoral researcher Gunuk Wang, lead author of the new paper, sandwiches the active silicon oxide between layers of palladium. The silicon-palladium sandwiches rest upon a thin layer of aluminium that combines with a base layer of p-doped silicon to act as a diode.  The structure is illustrated in the picture at the top of this story.

Wang's 32 x 32-bit test arrays are a little more than a micron deep with crossbar line widths of 10 to 100 µm for testing purposes.

"We didn't try to miniaturise it," Tour says. "We've already demonstrated the native sub-5-nanometre filament, which is going to work with the smallest line size industry can make."

The devices have proven to be robust, with a high on/off ratio of about 10,000 to 1, over the equivalent of 10 years of use, low-energy consumption and even the capability for multibit switching, which would allow higher density information storage than conventional two-state memory systems.

A scanning electron microscope image shows details of a 1-kilobit crossbar memory array designed and built at Rice University using silicon oxide as the active element. (Credit: Tour Group/Rice University)

The devices dubbed "one diode-one resistor" (1D-1R) worked especially well when compared with test versions (1R) that lacked the diode, Wang said. "Using just the silicon oxide was not enough," he said. "In a (1R) crossbar structure with just the memory material, if we made 1,024 cells, only about 63 cells would work individually. There would be crosstalk, and that was a problem."

To prove the 1D-1R's capabilities, Wang isolated 3 x 3 grids and encoded ASCII letters spelling out "RICE OWLS" into the bits. Setting adjacent bits to the "on" state - usually a condition that leads to voltage leaks and data corruption in a 1R crossbar structure - had no effect on the information, he said.

"From the engineering side of this, integrating diodes into a 1k memory array is no small feat," Tour says. "It will be industry's job to scale this into commercial memories, but this demonstration shows it can be done."

This work is described in detail in the paper, " High-Performance and Low-Power Rewritable SiOx 1 kbit One Diode - One Resistor Crossbar Memory Array," by Gunuk Wang et al published online on July 8th in Applied Materials. DOI: 10.1002/adma.201302047.

The Boeing Corp. and the Air Force Office of Scientific Research funded this work.

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