A
change in the market
A
similar shift is now taking place in the wet clean market. Traditionally,
the wet clean market has been dominated by wet bench or batch processing,
where multiple wafers are cleaned simultaneously in the same chamber.
The market is currently undergoing a significant shift in technology
focus, however, as larger wafer sizes and shrinking design geometries
are driving semiconductor manufacturers to prefer single-wafer wet
clean processing as a means to minimize the risk of cross-contamination
during critical cleans. In addition, batch processing has suffered
both from poor yields for processes using copper and low-k dielectric
materials and unsatisfactory performance in cleaning high aspect
ratio structures, adding increasing impetus to industry demands
for highly productive single-wafer wet clean technology. New single-wafer
platforms with improved productivity and reduced CoO are helping
to accelerate the change to single-wafer processing.
The
wet processing market is typically split into backside processes
like film removal, back side clean and silicon etch applications;
back-end-of-line (BEOL) cleans, such as polymer residue removal;
and front-end-of-line (FEOL) cleans, such as pre-cleans and post-ash
cleans (see Fig. 1). Batch processing still dominates FEOL cleans,
especially for nitride and oxide removal, resist strip and high/low-k
material removal. Backside applications, however, are predominately
single wafer, as are 40 percent of all BEOL cleans.
In
addition to its superior ability to meet the cleaning requirements
for advanced manufacturing, single-wafer clean technology also enables
faster cycle times and increased flexibility in lot scheduling,
which results in reduced work in progress.
As
the industry transitions to 65-nm manufacturing, logic manufacturers
are expected to lead a shift to FEOL single-wafer cleans, followed
shortly by the memory manufacturers as single-wafer tool CoO improves.
According to a Dataquest report (January 2003),
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Figure
3: SEZ's new Da Vinci DV-38F, a 300- mm single-wafer wet clean platform
for front-side polymer removal applications
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Figure
4: The DV-38F tool's eight process chambers are set in two sets
of four chambers
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the
total wet clean market was valued at approximately $1 billion (U.S.)
in 2002, a drastic decline of 40 percent from the previous year
that was driven by extreme pricing pressures due to the continuing
economic downturn.
As the industry transitions to 90-nm processing, wet cleaning has
become increasingly critical to semiconductor manufacturing. Based
on current assumptions of an industry recovery in 2004, industry
experts predict the wet clean market will grow to a minimum of $1.5
billion (U.S.) by 2005, a 50-percent increase.
Over
that same period, single-wafer processing is expected to grow from
20 percent of the market to 32 percent, a comparable 60 percent
increase (see Fig. 2). Interestingly, during the recent sharp decline
of the overall wet clean market, SEZ increased its market share
from 8.8 to almost 12 percent, a 36-percent increase despite the
overall market's 40-percent decline during the same period. SEZ's
increase in market share was solely due to single-wafer tool sales,
highlighting the growing demand for single-wafer wet processing
to meet advanced manufacturing requirements. The company currently
leads the single-wafer wet clean segment with a 70-percent market
share.
Single
wafer pioneers
SEZ
helped pioneer the single-wafer wet clean market, introducing its
first single-wafer tool in 1990 and its first 300-mm single-wafer
wet clean system in 1997. It has over 700 systems, representing
almost 1,000 wet clean chambers installed worldwide— totalling approximately
80 percent of all the single-wafer wet clean tools currently in
the field. Over 40 percent of the single-wafer systems SEZ sold
in 2002 were 300-mm tools, demonstrating the growing demand for
single-wafer processing in advanced manufacturing. The company's
newest tool, the DV-38F, a 300-mm single-wafer wet clean platform
for front-side polymer removal applications, is the first in its
new Da Vinci family (see Fig. 3).
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Intended
for high-volume production at the 90-nm and smaller design nodes,
it is designed to address the emerging cleaning challenges posed
by shrinking geometries and new materials.
The
Da Vinci DV-38F tool leverages SEZ's proven spin processor technology
in eight chambers to deliver significant productivity and CoO improvements
over previous generations of SEZ single-wafer tools. Its combination
of high throughput and smaller system footprint significantly reduce
tool CoO, making it a highly attractive and cost-effective alternative
to wet bench tools.
Its
proprietary spin processor technology also helps to reduce tool
CoO by reducing overall chemical consumption. In fact, the DV-38F
tool's chemical consumption is less than either wet bench or competing
single-wafer tools using spray technology. In addition, the system's
chemistry modules are integrated into the tool, further reducing
overall system footprint.
The
system's eight process chambers are located in two independently
operating sets of four chambers on either side of the tool (see
Fig. 4). This feature allows the operator to shut down half of the
chambers for preventive maintenance, while continuing to process
wafers through the other four, significantly enhancing system uptime
and contributing to the system's high productivity. In addition,
a graphic user interface (GUI) makes the system easier to operate.
The
combination of shrinking design rules and new materials are driving
the industry to accelerate its transition from batch to single-wafer
processing for wet clean applications. The market segment for single-wafer
wet-clean systems is expected to grow from 20 to 32 percent of the
entire wet clean market over the next couple of years as a result
of this demand. That shift is expected to accelerate as single-wafer
systems approach the levels of productivity and CoO currently enjoyed
by batch tools. SEZ's new Da Vinci DV-38F wet clean system is the
first in a new family of single-wafer tools that deliver the combination
of high productivity, low CoO, tool flexibility and process control
required to meet requirements for semiconductor manufacturing at
90-nm and smaller design rules.
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