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Wire Bonding Solutions For 3D Stacked Die Packages

Flexibility and low-cost of stacked die system-in-package designs make them ideal for the portable and handheld markets. Innovations in wafer fabrication and thinning are decreasing sizes to meet these specific requirements. Wire bonding continues as the most cost-effective interconnect solution for many stacked die package applications, writes Stephen Babinetz of Kulicke & Soffa Industries

The 3D stacked-die package has become the solution of choice to deliver smaller and more functional products to meet consumer demands especially in the portable and handheld markets. These system-in-package (SiP) designs provide flexible and low-cost solutions by combining existing, even legacy, materials into a single package. Although these multiple die devices can be produced using available assembly equipment, constant evolution has presented new challenges for wire bond interconnect processes.


In wire bonding, stacked die applications are typically categorised into two basic configurations: "pyramid" and "tower" (Figure 1). The pyramid approach consists of progressively smaller die mounted on top of larger die. In this method wire bonding can usually be completed in a single-pass. However, the looping may become more complicated as the upper die become smaller and the wire loops increase in length.

The second type of stacked die configuration is the tower, or same-size die, package (Figure 2). Here, similar sized die are stacked on top of each other separated by an interposer or spacer. This interposer is typically made of silicon to match the coefficient of thermal expansion of the die. The size and thickness of the interposer is selected to provide the necessary clearance for the wire loops formed on the lower die. Unlike the pyramid method, this approach must be wire bonded in stages. The lowest die and interposer are mounted before the first wire-bond phase. Each layer of the device is assembled in similar steps until the upper-most die is completely bonded.

When stacked die packaging was introduced several years ago, the thickness of each die was 180-200µm for a simple 2-die package. Innovations in wafer thinning have reduced the die thickness to 80-100µm and enabled 4- and 5-die stacking in a single industry standard package. While these advances have dramatically increased the versatility of these applications, they have also introduced new challenges for wire bonding.

As the thickness of the die is reduced, the concern with the same-size package type is the amount of overhang between the upper die and the interposer. Since the bond pads are located in this overhang region, it can act like a springboard under the application of force during the bonding process and degrade the adhesion of the bonded ball to the pad, cause other looping problems or break.

Figure 2 illustrates the deflection of the overhang region of the die during the application of force used in the ball bonding process. The change in shades on the top die indicates the degree of variation in deflection along the die edge.
Assuming a proper die attach exists between the two layers, the maximum amount of overhang is dependent on the die type, thickness, surface properties (after thinning), pad size and pad pitch.

While these items all impact the overhang capability, only pad pitch can be addressed through the wire bond process. Pad pitch directly influences the bond force required to ensure proper adhesion to the pad. Most manufacturers form ball bonds as close to the pad size as possible to ensure a robust process. Therefore, the larger the pad, the greater the force that is necessary for bonding.

It is shown in Figure 2, that the amount of deflection in the overhang region is a function of the amount of force applied during bonding. To ensure consistent bonding results across the die edge, the wire bond equipment must possess the combined capability of fine-resolution position control and force accuracy to maintain a consistent force application despite variations in die deflection. It is plausible that additional die overhang, or reduced deflection, can be achieved with finer pad pitch devices or by reducing the bonded ball size for the given pad.

In addition to bond performance, there are also potential looping issues that must be considered regarding the deflection of the overhang region. The deflection causes small changes in the wire payout that can affect the formation of low-profile (forward) loops and the formation of bump bonds used for reverse bonding. For looping, these changes may be made visible by slight variations in loop height. However during bump formation, these small changes may result in malformed bumps that can affect loop consistency, bond pad adhesion (no stick on pad) or loss of wire (short tail) problems that reduce yield or material throughput.

Die placement and repeatability are critical to the wire bond process in either of these package configurations. The combined placement error of all the dies must be considered when determining the assembly tolerances. Die rotation is another important factor in the assembly of stacked die packaging. Rotation of the die(s) can increase the risk of inter-layer wire shorts. Inconsistencies in placement and rotation can change the dynamics of the device to be wire bonded (loop height, length and shape) leading to inter-device looping variations that may result in yield losses during wire bond or encapsulation.

Substrate selection and layout

Proper choice of substrate type and layout can improve interconnect productivity and yield. The substrate should be selected with the overall wire loop length and shape in mind. If the die paddle area is too large, the wire lengths will increase making them more susceptible to variation. However, if the paddle is too small, more shaping is required during the formation of the upper layer wires in order to provide the necessary clearance from the lower wires. The added shaping can also lead to looping variations. Therefore the alternatives must be considered carefully during the design phase of the project.

As a general rule, it is desirable to limit the angle formed in the loop near second bond to a maximum of 45° (Figure 3). Forming angles greater than this can lead to loop height inconsistencies or wire sway as the wire lengths increase. This could result in yield loss due to wire shorts during wire bond or following encapsulation. This issue is particularly important for pyramid-stacked die since the wire lengths increase with each layer. Same-size designs are less affected since there is not the same clearance issue and the wires are similar in length.

Substrate leads should be at least 0.6mm in length to allow for sufficient spacing between adjacent bonds, especially in applications with multiple wires being bonded on the same lead. Wire bond locations should always be taut to provide the maximum possible separation between adjacent bonds and wires.

These recommendations may be difficult to follow when using existing (legacy) substrates for stacked die applications and it may be necessary to select a different interconnect solution.


In some cases a mixed technology solution, consisting of both wire bond and flip chip, is advantageous to achieve a thinner profile device or when higher thermal and electrical performance is required. For most semiconductor manufacturers, wire bonding remains the most flexible and cost-effective interconnect solution.

When more traditional methods are not cost effective, gold ball bumping can be used to prepare a wafer for flip chip processing. Current bonder processes allow the formation of bumps in a variety of shapes to meet different needs.

The overall height (BOH) achievable for each bump is dependent on the maximum diameter (BBD) and height (BBH) of the bonded ball. The desired shape and size of the bump dictates the capillary dimensions (hole diameter, chamfer diameter and inner-chamfer design) as well as the type and diameter of the wire necessary to ensure a repeatable process. Figure 4 shows both a gold ball bump smoothed, or coined, during the ball bonding process and the result of a newer bumping process that can be used to form higher profile bumps without stacking. Stacking is used to increase the overall height of bumps to achieve the desired level. Depending on application, it may be necessary to further flatten the tops of the bumps prior to mounting the flip chip die.

Wire bond process selection

The primary concern when designing a 3D device is the overall package height. As the number of stacked die increase, each portion of the assembly must become thinner. Currently, forward ball bonding processes can attain minimum repeatable wire loop heights of 100µm using 25µm diameter wire. Reverse ball bonded and wedge bonding can achieve lower loop heights, but there are other drawbacks to these processes.

When forming standard, or forward, bonded loops the focus must be on the overall length and shape of the wire. The length of the wire often governs the wire diameter used for bonding. As the wire length increases, so does the likelihood of sway during wire bond or encapsulation.

Using fan-out leads, a chip with less than a 50µm pad pitch can have a higher wire sway (sway limit) than the device can tolerate (sway tolerance). Devices with "parallel" bonded loops have less tolerance for wire sway, because the wires are closer together throughout the entire span.

One method to overcome sway is to apply working, or shaping, to create additional support in the wire and extend the functional length of the loop. The type of shaping applied is determined by the application. Generally loop shaping can be categorised into four different groups that are based on the number of bends formed in the wire.

The simplest and fastest loop trajectory involves no wire working other than that used to form the kink over the bonded ball. Speed is the primary advantage of this approach, which can be applied to a wide range of applications, especially the lowest wire layer in a stacked die.

The next group is the one-bend loop. Typically these shapes are used to extend the wire distance or to maintain the loop height at a greater distance from first bond (known as the flat length). These simple shape loops are ideal for the middle layers of either the pyramid or same-size stacked die applications.

Wire loops formed with two bends are used to extend wire lengths or in applications with special loop shape requirements. The bends are placed at different points along the wire path. The multiple bends make it possible to provide low loops that are less susceptible to wire sway or sag over longer distances. The amount and direction (positive or negative) of the shaping defines its use.

Examples include the M-loop (Figure 7, for long-low loops), chip-scale package (CSP) wires conforming to the die edge and the up-bonded loops for cavity-down applications. In addition to allowing longer loop lengths, the popular M-loop also provides a natural resistance to loop variation brought about by thermal expansion and contraction associated with some types of packages.

The last category in shaping is typically used when a loop with a very high angle approach into the second bond is required to avoid obstacles such as wires from lower levels of a stacked die device. Tail, or second bond kinks (Figure 8) are the most complex type of shaping and present a new set of challenges. The wire is less rigid and more difficult to shape the farther away the bend is from first bond.

When wire lengths increase (>90% of the wire length), as with the top-most layer, more consideration of the formation of the bend is necessary to minimise the impact to the rest of the wire loop. Depending on the desired shape angle of the loop, there may be a tendency for inconsistent wire payout using this method due to the wire properties (diameter, composition, etc.) and the friction between the wire and the bonding tool. This can lead to height variation in the loop.

It is important to remember that the wire shaping motions have a substantial influence on the throughput of the process. In general, each bend in the loop adds 10%-20% to the overall wire bond cycle time of the device. Therefore, it is recommended to use the minimum amount of shaping required for the application.

When trying to bond wires as close to the die as possible, looping capability is affected more by "non-machine" factors such as the tool dimensions and die thickness (Figure 7) constraining normal forward bonding in CSP applications.

Reverse bond looping

A drawback of the forward loop is neck damage in the wire above the ball when forming very low height loops. The height limitation will vary depending on the application and the diameter of wire. In situations where such loops are required, the method of reverse bonding, also known as stand-off stitch (SSB) or stitch-on-ball, can be used. In this process a bumped ball is first bonded at the location of second bond. The connecting loop is then bonded between the two bond locations as normal. The bumped ball is necessary when reverse bonding to die pads because a ball bonder tool could cause damage to this area when it comes into contact with the surface during bonding. In general, the size of the bumped ball dictates the minimum pad pitch capability of the process. The bump must be large enough to reduce the potential for wire sag or shorting near the second bond. In some cases, loop heights of less than two times the wire diameter can be maintained. A device with reverse bonded loops is shown in Figure 8. When forming chip-scale SSB wire loops it is important to remember that the "non-machine" factors associated with a forward bonded CSP loop also apply (Figure 9).

Another application of SSB-style bonding is to form very low profile inboard wire loops (Figure 10) to bond inboard pads on the top die of a pyramid or same-size stacked die device. Because of the low loop requirements it is impossible to shape the wire in the manner discussed so far. Without shaping, the loops are susceptible to wire sway and shorting during encapsulation. Therefore, to provide the necessary support, horizontal or "lateral" bends are formed in the wire. Pre-forming the loops in the direction of mould flow minimises sway and improves yield at encapsulation.

For pyramid stacked die devices, the ability to connect multiple dies to the same substrate lead finger can reduce package material costs and improve productivity. The individual wires going to each layer would be replaced by a single multi-stitched bonded (MSB) loop. Although robust in wedge bonding, the stitch in the ball bond process is the weakest portion of loop. Changes in wire direction during the formation of the second loop can cause failure. The alternative would be to form a "pseudo-MSB" loop by chaining together the desired number of SSB loops. Since the second bond of this loop is relatively flat, it is ideal for the subsequent first bonds of the joining stitch loops (Figure 11). The last loop in the series can be either reverse bonded or forward bonded depending on the nature and location of the second bond. Using MSB eliminates the need for potentially long and complex loop shapes common on the top-most die of pyramid stacked devices. However, this method needs careful consideration of the effects of bonding multiple times on the same pad.


As mentioned, looping performance can be attributed to the diameter of the bonding wire. Finer bond pad pitch processes require the use of smaller diameter wire, which provide less ability to support longer loop lengths. Larger wire diameters can increase process flexibility and enable longer wire lengths. Most manufacturers use reduced diameter wire in an attempt to minimise package costs. However, savings may never be realised due to the added expense of decreased assembly yield and productivity and increased engineering development costs. Thicker diameter wire may initially cost more, but there can be significant operating savings realised through productivity (reduced cycle times, shorter development time) and yield improvements (less wire sway or shorting) that can more than pay for the additional cost of the gold wire. While these claims cannot be quantified, it is sufficient to note the possibilities and suggest that wire selection be made on the basis of the application.

The selection of the bonding tool is another decision critical to interconnect process repeatability. During loop formation the wire is free to move through the capillary. Loop shaping causes the wire to be pulled against the inner surfaces of the capillary. Any changes in friction between these surfaces and the wire can affect the payout creating loop inconsistencies. Therefore these dimensions must be optimised to ensure process repeatability.

A smaller hole dimension provides better shape control. However, if a lot of shaping is required, using a tool with too small a hole may lead to inconsistent loop formation. In contrast, a larger hole capillary would result in less friction during loop formation and make looping more consistent, at the cost of better shape control. In ball bonding, ultrasonic energy is used as a lubricant to aid wire payout through the tool during loop formation. Conversely, excessive use of ultrasonic energy, especially with a smaller hole capillary, can induce inconsistent wire payout resulting from the wire sticking to these capillary surfaces.

The shape of the inner chamfer (IC) is selected based on the types of wire loops being formed. For most applications a single (SIC) or double (DIC) IC angle capillary is sufficient. However, in low loop applications, or those requiring significant loop shaping, an inner radius (IR) style capillary is recommended to reduce friction between wire and capillary (Figure 12).

The face and tip dimensions of the capillary are selected to provide optimum second bond strength for the bonding process. In stacked die applications, where multiple bonds may be located in close proximity, it is important to limit the tip size to prevent capillary interference with previously bonded wires. Some capillaries have a rounded transition between the IC and face to improve the tail bond strength at second bond. However, this feature may cause inconsistent wire tearing problems when used in a bumping process.

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