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Keysight Enable System-on-a-chip Makers With New Test Solutions

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Keysight Technologies, a technology company that deliversadvanced design and validation solutions to help accelerate innovation toconnect and secure the world, has announced that the company's new 224GEthernet test solutions enables system-on-a-chip (SoC) makers to validate nextgeneration electrical interface technology, accelerating 1.6 terabit per second(1.6T) transceiver design and pathfinding.


5G, artificial intelligence (AI) and internet of things(IoT) applications are driving growth in data traffic, creating unprecedentedbandwidth demands in networks and data centers. High-speed digital interfacesthat support 224 Gbps per lane data connection speeds offer increasedbandwidths and underpin 1.6 terabit per second (1.6T) high-speed interconnecttechnology. Improved data throughput and efficiency in data center networksalso reduce power consumption and cost. Keysight is the only provider of biterror ratio tester (BERT) solutions capable of generating and analyzing 224gigabit per second (224 Gbps) signals.

“Keysight is pleased to enable Synopsys, and othersemiconductor makers, capture early market opportunities associated with thetransition from 800 gigabit per second (800G) to 1.6T,” said Dr. JoachimPeerlings, vice president of Network and Data Center Solutions at KeysightTechnologies. “Keysight's unique portfolio of high-speed digital interface testsolutions enable Synopsys to validate the performance of 224G IP designsaccelerating 1.6T design and pathfinding.”

The M8050A BERT offers users a unique 224 Gbps test solutionfor electrical design and validation of transceiver SoCs used in data centersand networks for transferring large amounts of data at high speeds. Keysight'sM8050A BERT provides signal integrity that enables accurate characterization ofreceivers used in next-generation data center networks and server interfaces.Synopsys used Keysight's M8050A BERT, M8199 Arbitrary Waveform Generator (AWG)and Infiniium UXR-Series Oscilloscope to develop and validate 224Gserializer/deserializer (SerDes) IP designs.

“High-performance computing systems depend on high-speed,low-latency interfaces to process massive amounts of data with minimal power,”said John Koeter, senior vice president of marketing and strategy for theSolutions Group at Synopsys. “As a leading provider of high-speed Ethernet IPsolutions, Synopsys utilizes Keysight's comprehensive digital interface testsolutions to validate the performance of the PHY IP, enabling designers to meettheir design and system-level requirements for high-performance computing,networking and AI SoCs.”

At the European Conference on Optical Communication (ECOC)2022 in Basel, Switzerland, Keysight and Synopsys will demonstrate theindustry's first common electrical interface (CEI) SoC supporting 224Gbps.Exhibition visitors can view the demonstration at the booth hosted by theOptical Internetworking Forum (OIF), an industry organization that promotes thedevelopment and deployment of interoperable networking solutions and servicesfor optical networking products, network processing elements and componenttechnologies.


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