Arteris 'revolutionises' semiconductor design with FlexGen
Accelerates chip design by up to 10x, shortening and reducing iterations from weeks to days for greater efficiency.
Arteris has introduced FlexGen, a revolutionary, smart network-on-chip (NoC) interconnect IP. FlexGen from Arteris dramatically accelerates chip development while optimizing performance efficiency, addressing the rising demand for faster, more sustainable innovation in automotive, datacenter, consumer electronics, communications and industrial applications. With up to a 10x productivity boost, FlexGen slashes design iterations, significantly reducing the time required to develop cutting-edge chips. FlexGen also achieves up to a 30% reduction in wire length to lower power use, and up to 10% reduction in latency that results in improved performance in SoC and chiplet designs.
FlexGen builds upon the silicon-proven and physically aware FlexNoC 5 NoC IP technology and component library to automate the creation of high-performance network-on-chip (NoC) designs. Supported by AI-driven automation, FlexGen reduces manual adjustments by over 90%, enabling the generation of optimized NoC topologies in hours instead of days. This significantly accelerates development while maintaining the quality achieved through manual methods. These advancements are critical as the industry scales to meet the demands of advanced technologies like artificial intelligence, autonomous driving and cloud computing.
Dream Chip Technologies, a leader in automotive AI used for advanced driver assistance systems (ADAS), experienced the transformative potential of FlexGen. Using the technology, they reduced design iterations from weeks to days, enabling rapid experimentation and faster development.
“We have used FlexGen on our Zukimo 1.1 automotive ADAS SoC with excellent results. FlexGen’s automated NoC IP generation allows us to create floorplan adaptive topologies with complex automotive traffic requirements within minutes, allowing for rapid experimentation to find design sweet spots, and to respond quickly to floorplan changes with almost push-button timing closure. Our engineers are expert FlexNoC users, and we have been able to obtain superior power, performance and area (PPA) with shorter wire length and lower latencies using fewer resources with Arteris’ latest smart NoC IP product,” said Jens Benndorf, general manager of Dream Chip Technologies. “We plan to use FlexGen in production to deliver SoCs faster and with higher quality.”
By streamlining chip design workflows and automating key processes, FlexGen enables companies to tackle the growing complexity of semiconductor design with fewer resources, paving the way for innovations in AI, 5G, and industrial IoT.
“High-performance computing and AI SoCs have become very complex, creating expanding requirements to meet the energy efficiency targets and project schedules,” said John Rayfield, corporate vice president of AI Silicon at AMD. “Given our experience of working closely with Arteris in the past, we are excited about the smart NoC FlexGen technology and its ability to support our next-generation product innovation.”
"FlexGen is the culmination of years of ground-breaking innovation to boost productivity while improving quality of results in order to overcome the exponential design challenges semiconductor companies and system houses face when creating today’s sophisticated electronics," said K. Charles Janac, president and CEO of Arteris. "With 5 to 20 NoCs in an average SoC or chiplet, our customers need smart NoC IP that reduces design time while delivering superior quality of results, enabling faster innovation cycles for tomorrow’s products, which FlexGen delivers.”
