News Article
IMS CHIPS and Robert Bosch signed contract
Ultra thin chip fabrication capability will be a key enabler in future microelectronics and microsystems applications, such as three dimensional integrated circuits (3D IC) and systems in foil (SiF).
Robert Bosch GmbH Reutlingen and the Institute for Microelectronics Stuttgart (IMS CHIPS) have combined their background IP on Bosch’s porous silicon based APSM pressure sensors and thin chip fabrication based on so called Chipfilm and Pick, Crack&Place process modules from IMS Chips, respectively. The partners will join forces in process development to qualify the Chipfilm technology for industrial volume production.
The Chipfilm technology was pioneered at IMS CHIPS and introduced at the IEEE International Devices Meeting (IEDM) in 2006. During the pre-process extremely narrow cavities are formed within the chip areas on the wafer. The cavities result from shallow dual layer local anodic etching into the wafer surface, sintering and epitaxial overgrowth to set the target chip thickness and regain device quality silicon.
In this early stage of wafer processing the chips are firmly anchored to the substrate by lateral attachment and by the fact that the extremely narrow cavities become evacuated. The Chipfilm wafers can be introduced to silicon processing facilities like any conventional silicon process wafers. After circuit integration trenches are etched by means of the Bosch DRIE process along the sides of the chips down to the buried cavities leaving only limited anchors to the substrate. During Pick, Crack&Place the anchors are broken and chips are detached from the wafers and transferred to their destination.
The Chipfilm technology was pioneered at IMS CHIPS and introduced at the IEEE International Devices Meeting (IEDM) in 2006. During the pre-process extremely narrow cavities are formed within the chip areas on the wafer. The cavities result from shallow dual layer local anodic etching into the wafer surface, sintering and epitaxial overgrowth to set the target chip thickness and regain device quality silicon.
In this early stage of wafer processing the chips are firmly anchored to the substrate by lateral attachment and by the fact that the extremely narrow cavities become evacuated. The Chipfilm wafers can be introduced to silicon processing facilities like any conventional silicon process wafers. After circuit integration trenches are etched by means of the Bosch DRIE process along the sides of the chips down to the buried cavities leaving only limited anchors to the substrate. During Pick, Crack&Place the anchors are broken and chips are detached from the wafers and transferred to their destination.
