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News Article

Applied announces bold entry into 3DIC

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The industry giant drives the acceleration of TSV adoption in 3DICs and delivers a high performance etch system.
Applied Materials announced that it is leading a major effort to enable the widespread adoption of through silicon vias (TSVs), a rapidly emerging approach for vertically stacking integrated circuits (ICs) to boost chip performance and functionality in a smaller area. TSVs will be critical to satisfying consumers’ demands for faster, smaller electronics, enabling applications such as DDR4 DRAM memories and future communications and mobile internet chips. Since the biggest roadblock to implementing TSVs is cost, Applied is working internally and with other equipment suppliers to develop an integrated, high performance on wafer process flow to lower the cost, reduce the risk and accelerate time to market for customers.

Three dimensional (3D) IC integration is a new way for chip designers to deliver higher density, lower power consumption devices in a smaller footprint, without necessarily scaling the technology node. By modifying conventional wafer processing and packaging steps, multiple layers of similar or varying 2D devices are stacked and interconnected using TSVs so they function as a single device, thus avoiding the cost, space and performance issues associated with combining multiple functions on one chip.

There are several approaches to TSV implementation, and Applied has the production proven 300mm systems and processes required for the majority of TSV manufacturing steps, including mask, etch, film deposition and CMP technologies. For example, the simultaneously announced Applied Centura Silvia etch system was designed specifically to enable high performance, low cost TSV applications. To accelerate mainstream adoption, Applied is working with other equipment suppliers, such as Semitool and wafer bonders, to fully characterise interprocess dependencies while lowering overall costs.

The value of TSV enabled products is expected to increase significantly based on their enhanced performance that will in turn offset the increased cost of manufacturing. The EMC-3D Consortium of equipment suppliers estimates this cost target to be $190 per wafer; Applied’s goal is to reduce this cost to less than $150 per wafer.

“TSV technology will revolutionise chip designs and has great potential to expand into more sophisticated integrated memory/logic applications. Our collaboration with other equipment suppliers is an innovative way of doing business that is beneficial for the industry and can solve our customers’ problems,” said Hans Stork, group vice president and CTO of Applied’s Silicon Systems Group. “The capability to validate complete process flows at our Maydan Technology Centre gives us a unique window into how we can lower the cost and mitigate customer risk in adopting TSV processes. By providing the technology and key supplier relationships, we can help accelerate the adoption of TSVs for mainstream manufacturing.”

Applied Materials also unveiled its Applied Centura Silvia Etch system, specifically designed to enable high performance, low cost, through silicon via (TSV) applications. In addition to delivering a higher silicon etch rate and significantly lower operating costs than competitive systems, the Silvia system’s precise profile control enables the smooth, vertical via side walls that are critical for the subsequent deposition of high quality liner and fill films. The highly flexible Silvia system can etch both silicon and oxide in the same chamber, making it an ideal choice for established and emerging TSV integration schemes.

“Via etch is a key process in TSV fabrication where multiple etch steps can represent a significant portion of the total cost; therefore we have focused on providing a system that overcomes the traditional etch rate/profile trade off while significantly lowering the cost of ownership,” said Ellie Yieh, vice president and general manager of Applied Materials’ etch and cleans business unit. “The Silvia system is a natural extension of our long standing leadership in deep trench silicon etch, with an installed base of more than 200 chambers. Delivering high productivity, cost efficient TSV etch, the Sylvia system enables high quality, low cost, volume manufacturing for both wafer fabs and packaging houses.”

The Silvia system’s uncompromising performance is achieved with Applied’s proprietary time multiplexed gas modulation (TMGM) process. While conventional TMGM processes etch vias with heavily scalloped side walls that are difficult to fill, the Silvia system achieves smooth, vertical profiles at the rapid etch rates required for high productivity manufacturing.

The Silvia system’s exceptional profile control accommodates a broad range of TSV schemes, each with different challenges. In the 'via first' scheme, the Silvia system provides the required profile control and high selectivity to photoresist for etching very small, deep holes with very smooth side walls. The Silvia system is equally well equipped to meet the demands of 'via last' schemes, which are performed by packaging and semiconductor customers where cost of ownership (COO) is critical. The Silvia system delivers the lowest COO through low cost consumables and a high reliability platform design that has been proven over a decade of high volume manufacturing.
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