News Article
Partners renew vows
Synopsys expands collaboration with STMicroelectronics in timing sign-off. Companies collaborate to accelerate deployment of state of the art timing analysis technology for 45- and 32-nanometer process nodes
Synopsys has announced that it has further expanded its long standing relationship and technical collaboration with STMicroelectronics. The two companies have a long history of successful collaborations that have brought to market full-chip static timing analysis, formal equivalence checking and signal-integrity signoff tools. Synopsys and STMicroelectronics have agreed to join forces again to accelerate the development of leading edge methodologies and flows for low power and high performance system on chip (SoC) timing sign-off to reliably unleash the full performance potential of advanced technology nodes, while keeping runtimes under control for quick time to market.
As part of this collaboration, STMicroelectronics has chosen Synopsys' PrimeTime solution as the foundation for its golden timing analysis and sign-off methodology. The collaboration includes focused initiatives to accelerate and expand the deployment of Synopsys’ broad portfolio of state of the art timing analysis technology to STMicroelectronics SoC design teams worldwide, including advanced composite current source (CCS) modelling, statistical timing analysis, and advanced signal integrity and IR-drop-based delay calculation.
“We chose to team with Synopsys because of the breadth of their advanced timing technology, their ability to deliver good quality support globally, and the long track-record of collaboration successes between our two companies,” said Philippe Magarshack, group vice president, Technology R&D, STMicroelectronics. “By expanding our collaboration with Synopsys, we expect to quickly deploy all the right timing-analysis techniques to attain greater productivity and keep ST at the forefront of the SoC semiconductor industry.”
“Once again, Synopsys and STMicroelectronics are joining forces to advance timing analysis and sign-off,” said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. “Expanding our relationship continues the extraordinary success of the PrimeTime and PrimeTime SI solutions, leveraging the more than 10 years of deep technical collaboration between the R&D teams of the two companies.”
As part of this collaboration, STMicroelectronics has chosen Synopsys' PrimeTime solution as the foundation for its golden timing analysis and sign-off methodology. The collaboration includes focused initiatives to accelerate and expand the deployment of Synopsys’ broad portfolio of state of the art timing analysis technology to STMicroelectronics SoC design teams worldwide, including advanced composite current source (CCS) modelling, statistical timing analysis, and advanced signal integrity and IR-drop-based delay calculation.
“We chose to team with Synopsys because of the breadth of their advanced timing technology, their ability to deliver good quality support globally, and the long track-record of collaboration successes between our two companies,” said Philippe Magarshack, group vice president, Technology R&D, STMicroelectronics. “By expanding our collaboration with Synopsys, we expect to quickly deploy all the right timing-analysis techniques to attain greater productivity and keep ST at the forefront of the SoC semiconductor industry.”
“Once again, Synopsys and STMicroelectronics are joining forces to advance timing analysis and sign-off,” said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. “Expanding our relationship continues the extraordinary success of the PrimeTime and PrimeTime SI solutions, leveraging the more than 10 years of deep technical collaboration between the R&D teams of the two companies.”
