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ASML and Brion Technologies extend partnership with STMicroelectronics

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Integrated lithography for advanced chip development

ASML, along with its subsidiary Brion Technologies have announced a broad-scoped joint development project with STMicroelectronics (ST) to accelerate 28-nm node deployment and 22-nm node development. This joint development project, code-named SOLID (Silicon printing Optimization with Lithography control and Integrated Design), seeks to optimize the patterning process from design to manufacturing, extend characterization tools and methods to develop new correction/compensation techniques for reducing variability and explore breakthrough lithography solutions for manufacturing complex chips at sub-30-nm nodes.

ST will work with Tachyon SMO source-mask co-optimization in tandem with ASML's advanced illumination sources, including the recently announced FlexRay programmable illuminator. Together Tachyon SMO and FlexRay will provide ST faster development cycles in R&D and faster ramp to production. Till now, ST has successfully used Brion's Tachyon OPC+ optical proximity correction and LMC lithography manufacturability check in its 45-nm production.

"This joint development project combined with ASML's integrated suite of lithography products, including Brion computational solutions and the latest generation of TWINSCAN NXT scanner provides ST with computational and wafer lithography technologies that will enable us to develop optimum manufacturing solutions at 28-nm and below," said Joël Hartmann, Silicon Technology Development Director for STMicroelectronics, at Crolles, France. "Furthermore this ST-ASML effort is a reinforcement of the Crolles cooperative R&D cluster, which gathers partners around the development and enabling of low-power SoC (System on Chip) and value-added application-specific technologies. This is a perfect example of a project developed within the framework of the Nano2012 program."

"As a long-time customer of ASML, ST is an excellent partner with whom to explore and develop holistic lithography methods for creating advanced semiconductors," said Bert Koek, senior vice president, applications product group at ASML.

Nano2012 is a strategic R&D program, led by ST, which gathers research institutes and industrial partners and is supported by French national, regional and local authorities. The program aims to create one of the world's most advanced R&D clusters for the development of new generations of semiconductor technology platforms at the nano-electronic level, where the dimensions of the structures used to build the silicon chips are in the order of tens of nanometres (billionths of a meter).

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