News Article
Post 22nm strategies
SEMATECH Gate-Stack Symposium Identifies Post-22 nm Strategies
Participants at the recent 7th Annual International Symposium on Advanced Gate Stack Technology discussed strategies for implementing advanced logic and memory technologies for sub-16 nm node and beyond process technologies. The Symposium, hosted by SEMATECH, drew more than 100 international researchers from industry and academia that shared recent discoveries and outlined new gate stack strategies for the 16 nm technology generation and beyond.
"We are very pleased with the global participation in the conference, and with the outcome - in the exploration of solutions for functional stacks for future devices," said Paul Kirsch, SEMATECH's director of front end processes. "The Symposium's success can be attributed to the breadth and depth of its participants and their research findings. SEMATECH will continue to work collaboratively with the industry on fundamental issues on extending CMOS logic and memory technologies."
The technologies covered were high-k/metal gate stacks for Silicon (Si), Silicon Germanium (SiGe), III-V high performance MOSFETs, metal/high-k/metal stacks for resistance change memory, flash memory, and phase change memory.
Key observations include:
Progress is being made on Ge and III-V alternative channel material devices, although there was general acknowledgement among Symposium attendees that this area will require more effort and more resources to demonstrate manufacturable solutions.
Various presenters addressed the functional stack challenges for logic and memory centered on high-k metal gate for Si, SiGe as well as concerns over III-V high performance MOSFETs.
Consensus of the participants is although there are many hurdles to overcome, vertical stacking seems the most promising pathway for continued scaling.
To offset the slowdown in scaling and achieve uniformity and address reliability, newer, more innovative materials and switching mechanisms of non-volatile memories need to be investigated further.
Several presentations explored new or alternative materials and architectures beyond CMOS devices for 2020, including electron spin devices, graphene, and nanowire transistors. Prof. Kang Wang of University of California at Los Angeles reported efficient spin injection into Ge was realized using magnesium oxide (MgO) and is being optimized for spin transfer torque.
The International Symposium on Advanced Gate Stack Technology is part of the SEMATECH Knowledge Series, a set of public, single-focused industry meetings designed to increase global knowledge in key areas of semiconductor R&D.
