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Wafer Level packaging research

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ERS electronic opens centre for wafer level packaging
ERS electronic announced to open a new competence centre by the end of March at its headquarters near Munich, Germany. With its competence based on 40 years of experience in designing and manufacturing semiconductor production tools, ERS is a provider of thermal technologies in the semiconductor industry. For more than six years, ERS is committed to eWLB packaging technology through the development of innovative production tools for this promising technology. 

Being a fan-out manufacturing technology, eWLB offers a number of decisive advantages over traditional wafer-level packaging technologies. While in conventional WLP the number of chip contacts is limited by the die area, this is not the case in eWLB. In contrast, the technology allows chip manufacturers to implement a virtually unlimited number of external connections and thus provide the extremely complex chips required for tomorrow’s markets. 

Against the background of growing substrate sizes throughout the semiconductor industry, the ability of stringent warpage control for the re-constituted wafers is indispensable to achieve high production yields. The procedure of separating the substrate from the temporary carrier in fan-out WLP is a key step in the eWLB manufacturing process. Both aspects are core competencies of ERS, covered by patent-pending technology. 

In its new competence center, the company offers customers access to its latest eWLB development tools , flexible and highly innovative to cover the predicted tendency for ever larger re-constituted wafer and panels, enabling them to design and test their own eWLB-related projects and thus securing their market success. 

“Thanks to our good contacts, ERS already participated in the development of eWLB technology. This know-how allows us now to take that step and Munich will not be the last Competence Center of its kind,” says Klemens Reitinger, Managing Director of ERS electronic GmbH.
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