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Toshiba Reveals Multi-Core Embedded SoC

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Toshiba Corporation has developed an innovative low-power, many-core System-on-a-Chip (SoC) for embedded applications in areas such as automotive products and digital consumer products.


The prototype SoC integrates 64 cores, eight times more than its multi-core predecessor, and operates 14 times faster.


Details of the SoC and its development will be presented in the talk, "A Low Power Many-Core SoC with Two 32-Core Clusters Connected by Tree Based NoC for Multimedia Applications," at the 2012 IEEE Symposia on VLSI Technology and Circuits in Honolulu, Hawaii on June 15th.


Recent advances in multimedia processing, including video encoding and decoding and image recognition, have relied on multi-core processors that combine high performance with low power consumption. Many-core processors go a step further; by increasing the number of cores they boost SoC performance to much higher levels.


However, the power consumption and size of many-core SoC have been problems for their use in embedded applications. Toshiba's many-core SoC secures significant advances in performance while maintaining low power consumption and a cluster size of 84 mm2 , suitable for embedded applications.


Toshiba's new chip has a tree-based network-on-chip (NoC) architecture, which transfers data as packets in an SoC and highly efficient embedded processor cores. Integrated with image recognition hardware accelerators, the new SoC secures 1.5 tera operations per second at 333MHz.


The new SoC applies low power technologies throughout its structure, including multi-level power gating, clock gating and Toshiba's proprietary low power data-mapping flip-flop circuit. A flip-flop circuit stores state information as "0" and "1".


Advancing the fabrication process to 40nm secures a 40 to 50% boost in power  efficiency over the company's previous multi-core chip, manufactured with 65nm process. Toshiba plans to apply the multi-core SoC and its related technologies to high performance over-HD (high definition) resolution image processing and recognition.

 

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