News Article
STATS ChipPAC Announce Volume Manufacturing of Advanced Flip Chip Packaging Solution
STATS ChipPAC Ltd has announced its fcCuBE technology, an advanced flip chip packaging technology that features copper (Cu) column bumps, Bond-on-Lead (BOL) interconnection and Enhanced assembly processes, is in high volume production for multiple customers and the company has expanded its assembly processing capabilities to address a wider spectrum of bump pitch ranges from > 200 micron (um) to below 80um.
fcCuBE technology was designed to reduce the cost of flip chip packaging, expand the scalability of flip chip technology to much finer bump pitches and higher input/output (I/O) densities, and eliminate stress on the delicate ELK/ULK structures at advanced silicon wafer nodes. With STATS ChipPAC's patented BOL interconnect structure in combination with Cu column bumps, fcCuBE technology has shown to effectively address each of these objectives in a growing number customer applications.
A feature of fcCuBE technology is the ability to support both a standard mass reflow assembly process or a Thermo-Compression Bonding (TCB) process. With mass reflow, STATS ChipPAC has been able to achieve a 10-30% cost reduction in package designs with fcCuBE technology as compared to conventional flip chip interconnect. STATS ChipPAC has qualified fcCuBE down to 80um bump pitch using mass reflow and is in development of finer pitches.
"fcCuBE technology with the mass reflow assembly option has provided our customers with the benefit of having an advanced flip chip package with increased device performance and superior reliability at a price point comparable to mainstream semiconductor packages. We are in volume production with multiple customers and continue to engage this technology in a wide range of products and applications. With the inherent scalability of fcCuBE, we have expanded our services to provide customers with a Thermo-Compression Bonding assembly process which supports ultra-high densities at advanced silicon nodes and emerging 3D technology such as Through Silicon Via (TSV) interconnection," said Dr. Han Byung Joon, Executive Vice President and Chief Technology Officer, STATS ChipPAC.
TCB is a more complex interconnect process as compared to mass reflow, providing the increased level of precision required for bonding higher density and tighter pitch flip chip configurations. For fine pitch bump requirements, TCB enables the assembly of very small bump diameters in more advanced wafer fab nodes and supports bonding requirements such as chip-to-substrate or chip-to-chip. This provides STATS ChipPAC's customers with the flexibility to select either the mass reflow or TCB assembly process with fcCuBE technology and allows a more optimized package design across the widest range of bump pitches, particularly with a co-design relationship.
