SPIE to host Advanced Lithography forum
Many leading manufacturers will discuss photonic integrated circuits versus silicon photonics, retooling for 450mm wafers and power-source issues in EUV tools
Lithography scientists, engineers, and developers, long accustomed to working years ahead in order to meet industry needs, face keen challenges, with meeting user expectations, enabling new capabilities, and controlling costs at the top of the list.
SPIE Advanced Lithography, the annual forum for discussions on meeting the challenges in developing state-of-the-art lithographic tools, resists, metrology, materials characterization, and design and process integration, will bring the community together in San Jose, California, to address those issues.
The event will run from 24th to 28th February at the San Jose Convention Centre and San Jose Marriott Hotel.
Symposium chair Harry Levinson, of GLOBALFOUNDRIES, says organisers anticipate interest in several topics in particular.
These include designing with multi-patterning and directed self-assembly (DSA): beyond SEMs toward real chips. Also on the agenda will be line edge roughness: clearly a concern of many and the focus of a session in the conference on Advanced Etch Technology for Nanopatterning. Another topic for discussion will be resist limits: secondary electrons, tradeoffs among resolution, line-edge roughness and exposure speed.
However, Levinson notes, "To be honest, the real buzz usually comes from something unexpected, which is probably one of the best reasons for attending Advanced Lithography."
With the presence of leaders from companies such as Intel, Samsung, ASML, Taiwan Semiconductor Manufacturing Corp., and other companies that have announced large investment strategies in new technology, "unexpected" topics might include R&D toward photonics integrated circuits versus silicon photonics, retooling for 450mm wafers, or power-source issues in EUV (extreme ultraviolet) tools.
In addition to featured speakers and more than 560 technical talks, the event will include panel discussions on disruptive and emerging technologies, full- and half-day short courses on lithography topics, interactive poster paper receptions, and a 60-company exhibition showcasing many of the industry's top semiconductor suppliers, integrators, and manufacturers. The exhibition will run Tuesday and Wednesday, 27th and 28th February.
Plenary presentations from leaders in the lithography industry include:
* Bill Siegle, Independent Consultant and ASML Advisory Board Member: "Contact printing to EUV: lessons learned from the art of lithography"
* Howard Ko, Senior VP and General Manager, Synopsys Silicon Engineering Group: "The evolution of EDA alongside rapid silicon technology innovation"
* Charles Szmanda, The Patent Practice of Szmanda & Shelnut, LLC: "The new U.S. patent law: what you need to know and how it will affect your strategy"
Technical talks are organised into seven conferences:
* Alternative Lithographic Technologies
* Extreme Ultraviolet Lithography
* Metrology, Inspection, and Process Control for Microlithography
* Advances in Resist Materials and Processing Technology
* Optical Microlithography
* Design for Manufacturability through Design-Process Integration
* Advanced Etch Technology for Nanopatterning
Accepted papers will be published in the SPIE Digital Library as soon as approved after the meeting, and in print volumes and digital collections.
