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Soitec expands for sSOI and SGOI

Soitec is expanding manufacturing capabilities of strained silicon-on-insulator (SOI) wafers. Specifically, the company is installing epitaxial equipment in its pilot line facility and a full Smart Cut strained-silicon germanium-on-insulator (SGOI) and strained-silicon-on-insulator (sSOI) manufacturing line at its Bernin II site in France.
Soitec is expanding manufacturing capabilities of strained silicon-on-insulator (SOI) wafers. Specifically, the company is installing epitaxial equipment in its pilot line facility and a full Smart Cut strained-silicon germanium-on-insulator (SGOI) and strained-silicon-on-insulator (sSOI) manufacturing line at its Bernin II site in France.

SGOI early production is due to start Q4 2004. When at full capacity, the new line will run more than 60,000 200mm-equivalent wafer starts per year.

Fabricating strained SOI requires strained silicon and silicon germanium (SiGe) epitaxy as well as ultra-thin SOI.

"Currently, strained SOI appears to offer the greatest potential for improving the performance of ICs with 65nm and below design rules," comments Andre Auberton-Herve, Soitec president and CEO. "Adding these new capabilities - particularly the ability to perform the epitaxy process in our own production facility - will help ensure that we can rapidly deliver volume quantities of high-quality strained SOI wafers, to be in line with our customers' demand."

During fabrication of strained SOI wafer substrates, the epitaxial steps are followed by bonding and layer transfer to a handle substrate. Throughout strained silicon layer transfer, bonding and strained SOI finishing, the strain must be preserved. This is made possible by Soitec's Smart Cut technology.

The development of the donor SiGe epitaxial wafer relies on expertise gained through Soitec's partnership with ASM International. Soitec is to focus on fine-tuning the epitaxial processes to optimise donor substrate performance, boost productivity and maximise cost efficiency. The aim is a fully industrialised sSOI solution for 200mm and, ultimately, 300mm wafers.

Introducing the strain into the silicon - stretching it in a horizontal plane - requires several silicon and silicon germanium epitaxial steps to obtain the thin layer of strained silicon at the donor substrate’s surface.

The first product in Soitec's new portfolio of strained SOI substrates will consist of an SGOI template substrate on which a final strained silicon layer is grown. Tailored for partially depleted applications, these SGOI wafers will enable the semiconductor industry to improve device performance, while shrinking critical dimensions and increasing chip density. Soitec's subsequent generations of strained silicon solutions will include SGOI with higher germanium content, strained SOI without the SiGe template layer (sSOI), and GeOI.

These products would be all geared to the 45nm technology node and beyond for both fully and partially depleted device architectures.

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