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MEMC joins IMEC strain silicon programme

MEMC Electronic Materials agreed to join IMEC’s research on high-mobility layers and advanced source/drain engineering. The company will join the IMEC Industrial Affiliation Program (IIAP) that targets solutions in scaled planar devices.
MEMC Electronic Materials agreed to join IMEC’s research on high-mobility layers and advanced source/drain engineering. The company will join the IMEC Industrial Affiliation Program (IIAP) that targets solutions in scaled planar devices.

MEMC has also licensed IMEC's thin strain relaxed buffer (SRB) technology. The wafer producer plans to produce blanket strained silicon bulk wafers using SRB at its facility in Missouri. Engineering and qualification samples are due to be available by May 2004. This is an addition to current samples based on MEMC's in-house strained silicon technology.

Dr Luc Van den hove, vice-president of Silicon Process and Device Technology at IMEC, explains the value of SRB: "Our thin SiGe SRB technology allows us to build strained Si layers with a similar quality as the more familiar thick SRB approach - achieving 10 times thinner SiGe SRB layers and without the need for an expensive CMP step. These features make our technology economically attractive. The collaboration with MEMC will help to make strained Si available to IC manufacturers."

Strained silicon increases carrier mobility providing device manufacturers with an alternative path to continue scaling beyond the 90nm technology node.

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