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News Article

Sarnoff Europe takes charge of more business

Renesas Technology has agreed to license Sarnoff's TakeCharge technology, which allows IC designers to create on-chip electrostatic discharge (ESD) protection circuitry.
Renesas Technology has agreed to license Sarnoff's TakeCharge technology, which allows IC designers to create on-chip electrostatic discharge (ESD) protection circuitry.

The deal covers Renesas' silicon-on-insulator (SOI) products, including 90nm and 65nm devices. Renesas plans to supply optimised and compact SOI products offering strong ESD protection while reducing the amount of time required for design and development.

Renesas Technology has long used its own proprietary ESD protection technology in its bulk silicon CMOS products. However, as miniaturisation advances, the use of bulk silicon as a raw material is giving way to SOI, especially in the 65nm process.

Renesas is buying in Sarnoff's technology to accelerate development work on advanced system large-scale IC (LSI) devices. TakeCharge provides a high level of ESD protection in a smaller surface area, which allows the development of smaller chips. Finally, it has low parasitic capacitance, making it ideal for use in high-speed applications.

ESD can occur between the printed circuit board and LSI devices during the production process. Static electricity that has built up on the printed circuit board can be discharged when the LSI devices are mounted. This raises the danger that ESD will cause excessive current flow within the LSI device and destroy its internal elements. One way to prevent this is the use of special circuitry to protect the internal elements of the LSI device. In an SOI device the transistors are formed on top of an insulator. This makes such devices even more susceptible to damage from ESD and makes effective counter measures even more important.

Sarnoff's European subsidiary develops and markets the ESD technology worldwide.

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