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News Article

Designing for signal integrity

Signal integrity (SI) views have been developed for ARM's Foundry Program Partners with electronic design automation (EDA) company Cadence Design Systems.
Signal integrity (SI) views have been developed for ARM's Foundry Program Partners with electronic design automation (EDA) company Cadence Design Systems.

The views are for designers incorporating hardened ARM processors into their 130nm and below work, allowing access to critical data required to perform detailed voltage drop and SI analysis. This analysis speeds time-to-market of nanometre-scale system-on-chip (SoC) designs by rapid detection and resolution of critical SI issues.

The ARM processor views support industry-leading Cadence tools, including CeltIC cross-talk analysis and repair and VoltageStorm power grid analysis within the Cadence Encounter digital IC design platform.

Smaller features and the use of hardened intellectual property (IP) creates the risk of critical design problems due to SI issues when designers have no SI views for the hardened IP.

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