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Process R&D in the nanochip era

The challenges of working at the nano level require a new approach to process research and development, writes Dr Mark Pinto of semiconductor equipment giant Applied Materials.

The challenges of working at the nano level require a new approach to process research and development, writes Dr Mark Pinto of semiconductor equipment giant Applied Materials.

Advances in silicon process technology have been the engine of the fast-moving chip industry, continuously improving the functionality and performance of integrated circuits. As we progress further into the challenging realm of nanometre-scaled devices, the need to invest in technology has never been greater.

At the same time, the dynamic economics of the chip industry - with periods of strong growth followed by painful slowdowns - make it difficult for companies to maintain a continuously high level of R&D into process and equipment, especially at the most advanced levels.

Moreover, R&D is becoming more expensive, broader in scope and requires more continuous innovation than ever before. These trends will continue to drive changes in how the semiconductor industry pursues process R&D.

Difficulties with device scaling are sparking an explosion in the number of new materials being considered in chip making compared with even ten years ago.

In the arena of the transistor/capacitor alone, strain-engineered materials, new gate metal compounds, advanced barriers and high k dielectrics are all transforming the device flow - driven by the need to control power dissipation.

In the interconnect wiring, for instance, the intensely competitive development of various low k dielectrics has proved much more complex than many had anticipated. To meet the roadmap's key challenges in a timely way, we must learn and adapt processes and equipment faster than ever before.

Process integration has always been a key issue but it has become increasingly important that integration is given greater consideration in materials, equipment and process development.

Compared to a decade ago, the chip equipment industry is performing a much broader range of R&D.

For example, in the copper/low k interconnect field, customers want to know much more than simply the thickness of the film or some other simple measurement. They want to know how it etches, the reliability of the material in a via, whether it will work in a bumped array package, and so forth.

More up-front work on integration speeds the development of suitable materials and processes and achieves better quality, validated tools that are proven to work in a fab environment. Getting from single-process R&D to this level of understanding and validation takes massive investment in facilities, tools and technical expertise.

The sheer magnitude of the challenges ahead is forging a new spirit of collaboration between equipment suppliers, device makers, universities and other research organisations.

At the fundamental research level, it is critical that we take greater advantage of universities' capabilities. Universities not only have the structures to pursue much of the basic research, particularly in the field of semiconductor materials, they supply us with innovative people whose ideas will determine the future.

At a more commercial level, device manufacturers are increasingly open to carrying out joint development work with their equipment/process suppliers.

With many customers also working together in alliances, equipment companies are now better able to prioritise technical programmes and put the necessary investments behind achievable goals.

Additionally, the challenges of improving design for manufacturability are encouraging new cooperation between equipment and process development and electronic design automation (EDA) suppliers.

The chip industry has already entered the realm of nanoelectronics, with feature sizes below 50nm and film thicknesses less than 1nm now commonplace in volume manufacturing.

At this scale, semiconductor tools can manipulate, analyse and construct molecules, providing amazing opportunities for applications outside of electronic circuits. Consider the impending convergence of biology and nanotechnology and the opportunities for synergy between these two industries.

Other areas of promise include energy and sensing. These new opportunities will also drive more use of nanoelectronics, for instance to make real time decisions on acquired data and communicate results.

Governments around the world are spending more than $4 billion this year on nanotechnology research. A key challenge will be to bring the variety of expertise together to expand the number of promising ideas and also to accelerate R&D and commercialisation.

The nanochip era is shaping up as one of intense collaboration by everyone in the technology food chain. Timely innovation is essential, requiring new materials and new designs.

We need to be very smart in how we approach our R&D investments, in a world where the most efficient developers will get the biggest market return, while the inefficient lose out.

It is critical for companies to continually rethink their R&D priorities to focus on what most differentiates their products and then look to leverage partners in other areas.

There is only one plausible avenue for a prosperous future, and that is by working very closely together to make it happen. The information age depends on us.

Dr Mark Pinto
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