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Standard control

Moving to any new technology node carries challenges. The move to 300mm manufacturing has become a watershed experience for the microelectronics industry. Wil Josquin, VP Industrial Strategy and Flexibility at Philips Semiconductors discuses the importance of APC and standards to ensure right-first-time 300mm wafers

Moving to any new technology node carries challenges. The move to 300mm manufacturing has become a watershed experience for the microelectronics industry. Wil Josquin, VP Industrial Strategy and Flexibility at Philips Semiconductors discuses the importance of APC and standards to ensure right-first-time 300mm wafers.

With the transition from 200-mm to 300-mm wafers, one of the most noticeable changes in the semiconductor manufacturing industry has been the emergence of far more standardization, both in terms of wafer processing equipment, software protocols and process flows. Although many IDMs producing 0.18-ìm and 0.13-ìm chips on 200-mm wafers introduced a great deal of internal standardization, using identical furnace, lithography and etching equipment in each of their wafer fabs to insure consistent product quality and continuity of supply, standardization for 300-mm wafer processing at sub-100 nm technology nodes is industry-wide. Considering the small number of 300-mm wafer fabs that have been set up, the dominance of a few equipment suppliers, and the existence of well-defined performance requirements for sub-100 nm wafer processing, this is not surprising.

Despite the fact that process flows for sub-100 nm CMOS manufacturing on 300-mm wafers are more complex than those for previous process generations, the hardware and software compatibility brought about by standardization has considerably speeded up the process of getting advanced chip production lines up and running. The 300-mm wafer fab established in Crolles (France) by the Crolles2 Alliance (a partnership between Philips, Freescale Semiconductor and STMicroelectronics) commenced pilot production of 90-nm CMOS devices earlier this year, with Philips achieving right-first-time silicon from it at the outset. The fab is now qualified and ramping volume production of the 90-nm technology.

Increased standardization also opens up the possibility of generating more synergy in the process improvement effort by making it easier for improvements to promulgate quickly throughout the industry. This means that despite the ever increasing challenges imposed by the ITRS roadmap, individual IDMs will not have to step up their efforts in process tuning compared to the past. The responsibility for process enhancement will become to a greater extent the responsibility of the equipment manufacturers. The economics of how this will work will depend on their business models, but the improvements that accrue will be widely available. Given the fact that most 300-mm fabs will be run by alliances, with the resources and production volume to reach manufacturing excellence, this means that all modern 300-mm wafer fabs will probably operate at virtually identical very high yield levels. A 300-mm fab in 90-nm that could not achieve these very high benchmark yields would lose so much money that it would not survive.

The precision of the process control available on these new lines also means that the time taken between initially running a chip design and getting it up to full yield is getting much shorter. In the past this could take several months. For the Crolles2 production line, Philips is doing it in a matter of weeks. This very precise control is a result of much better process metrology, often integrated into manufacturing equipment, together with advanced data processing and process control methods. These include software to implement advanced process control (APC) features such as feed-forward – the capability for equipment further down the production line to have wafer-specific measurement data on parameters such as oxide thickness so that subsequent process steps can be fine-tuned to specific wafers. In some cases this fine-tuning can even be tailored to specific chip designs, allowing critical process steps to be adjusted in order to improve yield.

With increasing automation, not only in process control but also in straightforward aspects of production such as the transport of wafers between equipment, it is tempting to think that staffing levels in wafer fabs will fall. In practice this is not likely to be the case. Although fewer staff are needed to physically intervene in the production process, greater support is needed on the automation side, in areas such as software maintenance and metrology. Although this high-level support requirement may actually increase labor costs, the sums of money are likely to be insignificant compared to the capital cost and non-labor operating costs involved in setting up and running an advanced 300-mm fab. What has become clear is that the overall cost of such fabs can only be borne by consortiums of IDMs that can leverage their combined production volume to keep the fabs running at peak performance.

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