ALD together now

Significant progress has been made in readying atomic layer deposition for manufacturing. Drs Tom Seidel and Sasangan Ramanathan of thin-film deposition equipment manufacturer Genus report.

Atomic layer deposition (ALD) technology has achieved a number of milestones in both the semiconductor and data storage fields.

But to maintain this progress, ALD will have to meet four key challenges: industry roadmap needs; increased productivity; manufacturing worthiness; and process flexibility. Here, we provide examples of progress that has been made in each of these areas.


Industry roadmap needs
Industry roadmaps call for the extension of DRAM deep trench capacitor technology and improved stack and embedded DRAM capabilities below the 100nm node (1).

Near 35nm with 4-8Gbit densities, high k films are essential in high aspect ratio structures. Furthermore, because of the high aspect ratios, the amount of film area is more than 20 times greater than a 300mm silicon planar area.

The challenge therefore is to increase film deposition rate and chemical precursor delivery rate well above what is available today.

The International Technology Roadmap for Semiconductors - 2003 revision (ITRS -03) also calls for low leakage MOSFET (metal oxide silicon field effect transistor) gates with equivalent oxide thicknesses (EOTs) of less than 1nm.

Illustrations of conformal coverage for high k films by ALD for 100nm DRAM structures for both deep trenches and stacked capacitor structures are shown in Fig 1a and 1b, respectively (2,3).

The fabrication of advanced gates for low power transistors with EOTs below 2nm has been achieved. Several results are compared in Fig 2 (4). While HfAlO and HAlON offer greatly reduced leakage currents (5), HfSiO shows higher mobility.

High k materials are being developed together with metal gates to further reduce EOT. FLASH films - which are thicker - require both the low level leakage of capacitor films and the interface control and thermal process integration budget of gates.


Increased productivity
ALD technology might not at first glance appear to be suitable for many applications - such as FLASH and RF/bypass capacitor films - because of its apparently limited film deposition rate of around 10A/minute.

But far faster deposition rates of around 100A/minute have recently been reported using Rapid ALD (RAD) processes with extremely short exposure times in the range 0.1 to 0.2 seconds (6).

The rapid exposure is achieved by limiting the dosage and cutting down the purge times to almost zero. The reduced cycle time more than makes up for a moderate reduction in ALD deposition rate (A/cycle). The optimisation of the film deposition rate is illustrated in Fig 3 for Al2O3.

Despite being much quicker, RAD maintains all the characteristics of standard ALD, including digital control, uniformity (~1%, one sigma), reproducibility (stable thickness, range and low particle metrics under "Marathon" conditions) and conformal coatings (>90% on 40:1 AR features at 100nm features).

The technology also achieves Al2O3 stoichiometry identical to standard ALD, low CVD content and very good as-deposited and post deposition annealed (PDA) electrical properties.


Manufacturing Worthiness
The use of sub-second cycle times places a burden on fast switching valve reliability, yet valves with more than 30 million cycle reliability are close to final release by OEMs and high ALD system reliability can be supported with sub-second cycle time.

It is for such reasons that ALD has already been accepted as a manufacturing method for thin film reader heads in data storage for scaling to 100Gb/in2 (7).


Process flexibility
Flexible ALD equipment has also been developed that bridges 200mm and 300mm wafers on the same process module, has up to four liquid sources - providing for direct formation of multi-element compounds - and offers RAD-type deposition rates.

The more films scale towards atomic dimensions, the more ALD meets the long- term needs of the semiconductor industry. Moreover, the technology is now being developed with higher film deposition rates as well.

Definitely one to watch for the future



References:

1. International Technology Roadmap for Semiconductors - 03, Published by Semi, San Jose CA 2004

2. M Gutsche et al, "Capacitance Enhancement Techniques for Sub-100nm Trench DRAMs", IEDM Tech Dig, p411, 2001.

3. J-H Lee et al, "Mass Production Worthy HfO2-Al2O3 Laminate Capacitor Technology using Hf Liquid Precursor for Sub-100nm DRAMs", IEDM Tech Dig, paper 3.1, 2002.

4. T Seidel, "Progress and Challenges for ALD Applications", ALD-03, AVS August 4-6, 2003.

5. H-S Jung et al, "Improved Current performance of CMOSFETs with Nitrogen Incorporated HfO2-Al2O3 Laminate Gate Dielectric", IEDM Tech Dig, paper 34.2, 2002.

6. TE Seidel and S Ramanathan, "Emerging Pathways for Sustained Progress in ALD", Nano Electronics Materials Conf (NEMatC), Grenoble, March 1-3, 2004.

7. Wei Xiong et al, "Ultra-thin ALD Alumina Reader Gaps for High Density Recording Heads", MMM Conf 2001, Session HP-03; See also M Kautazky, ALD-03, AVS August 4-6, 2003.


Author biographies:

Dr Tom Seidel's career spans service with Bell Laboratories, JC Schumacher, Sematech and Genus, where he is currently chief technical officer. He has technical contributions in atomic layer deposition, ion implantation, rapid thermal processes, defect control and technical management roles in CMOS device manufacture, equipment sets, and industry roadmaps.

Dr Sasangan Ramanathan has a PhD in chemical engineering and has been in the semiconductor equipment industry for more than eight years. He is currently vice president of technology and applications at Genus. His technical expertise is in chemical vapour and atomic layer deposition of a variety of materials for capacitor, gate stack and advanced backend interconnect applications.

Fig 1a. Al2O3 coverage of deep trench. Near 100% step coverage

Fig 1b. HfO2-Al2O3 laminate coverage on stack cylinder DRAM

Fig 2. Gate performance spider chart illustrating lower leakage and mobility trends

Fig 3. RAD optimisation - dose control parameter is H2O exposure time, reaching maximum film growth rate near 0.1sec