Process development
Testing also verifies that this high-level strain can be maintained throughout the subsequent high-temperature processes used in the semiconductor manufacturing cycle.
The company reports that customer and internal evaluations show that the PD-sSOI is a robust solution that meets the processing requirements of the 65nm and smaller technology nodes. Samples have been offered to development partners. Production samples will be available throughout 2005 with full-volume production due in H2.
Soitec believes that its new product will allow global chipmakers to achieve up to an 80% improvement in the electron mobility on future chips without significant process changes or any of the yield concerns associated with germanium-based strained SOI technologies.
Soitec's president and CEO Andre Auberton-Herve comments: "This is an ideal solution for both partially- and fully-depleted architectures, since it overcomes front-end-of-line integration and yield concerns associated with germanium, and thanks to wafer-level strain is no longer dependent on IC design."
Soitec plans to offer a complete portfolio of strained SOI engineered substrates to meet a broad range of requirements for both partially-depleted (more than 35nm thick) and fully-depleted (less than 25nm thick) architectures. The company has worked with semiconductor equipment supplier ASM International to develop this capability. VESTA Technology is selling an atomic layer deposition (ALD) system for 200mm/300mm wafers. The VULCAN tool can perform in-situ and/or sequential dual mode metal-ALD with chemical vapour deposition (CVD) processing capability. The dual mode deposition technology integrates a precision ALD for initial layers with high throughput CVD for bulk layers. Both the initial ALD layer and the CVD fill are deposited within the same chamber with or without plasma.
The integration of in-situ and/or sequential deposition approach is designed to overcome both the film quality limitation of CVD processing and the low deposition rate limitation of ALD processing. By adopting plasma technology, low temperature deposition is achieved for gate electrodes, back-end-of the line (BEOL) metallisation and applications using polymeric substrates.
VESTA's executive director, Chuck Kim, reports: "Our existing Nano-ALD System for 200/300mm ALD for dielectric applications currently has an installed base of over 35 systems in high volume production lines. The systems are being utilised for capacitor and gate applications requiring various oxide film processing. Our first production VULCAN system has been qualified in a leading-edge 300mm production fab where it will be used for advanced memory device applications. "
