Process development
Applied Materials claims the only commercially available chemical vapour deposition (CVD) technology that meets the stringent requirements for 65nm and below, greater than 7:1 high aspect ratio gap-fill for shallow trench isolation (STI) and pre-metal dielectric (PMD) applications. The new Producer HARP (high aspect ratio process) system also enables enhanced transistor performance through strain engineering, depositing films that can induce stresses on silicon - a leading contender for improving device performance. The process is based on an ozone-TEOS chemistry.
"The rapid progress in transistor scaling has made gap-fill technology increasingly critical for all advanced devices," says Dr Farhad Moghadam, vice president and general manager of Applied Materials' Dielectric Systems and Modules product group. "The HARP system gives chipmakers demonstrated 65nm-generation gap-fill capability, with the only multi-generational extendibility to 45nm and beyond, yet cuts operating cost by up to 15% and consumables cost by as much as 50% over all other gap-fill solutions. And unlike conventional gap-fill technology, the system's stress-tunable films can enhance signal speed in the channel and contribute to a marked improvement in transistor performance."
HARP uses a thermal process so there is no plasma damage to the device, enabling improved reliability. For PMD layers, the system has demonstrated gap-fill capability in features smaller than 10nm and a thermal budget compatible with advanced materials including NiSi.
For stress-engineered substrates, Applied's customers have reported a significant improvement in nMOS drive current for 90nm devices and expect additional increases for 65nm devices using the HARP process, with no additional cost requirements or mask layers. These speed gains can account for 10-20% of the total transistor speed improvement required per chip generation, without added integration complexity.
Axcelis Technologies has been awarded a US patent for technology found in its ultra high current, low energy ion implant system. The new patent completes Axcelis' intellectual property portfolio for the Ultra platform.
Patent No.6,759,665 ("Method and System for Ion Beam Containment in an Ion Beam Guide") covers the use of multi-cusped magnetic fields for confining electrons in the beamline. By enabling improved high current, low energy ion beam transport, the technology allows users to increase productivity when manufacturing ultra shallow junctions and other shallow-depth structures essential to advanced semiconductor production.
High current increases the number of ions implanted making for faster throughput. However, with low energy ions, high current densities lead to beam instabilities since the ions repel each other (space charge effect).
Axcelis has received three other US patents related to electron confinement technology over the past two years. Axcelis has filed corresponding patent applications covering the technology in Europe, Japan, South Korea, Taiwan and Singapore.
