Process development
Infineon has made a 10% improvement (typical) in linear efficiency on its new GOLDMOS high-power RF transistors process, compared with the previous generation. The IC producer continues to use gold metallisation, it says, because of proven superior reliability at high temperatures. Other improvements come in the form of ultra-wide-bandwidth, reduced memory effect and the industry's best thermal performance. Power density has increased by 30%.
One of the first products incorporating the new technology is the single-ended, 100W PTFA211001E 2.1GHz device. In the two-carrier WCDMA 3GPP mode, this device has an average output of 22W and 16.5dB gain with 30% efficiency. It has an ultra-wide-bandwidth of several hundred MHz, third-order intermodulation distortion (IM3) performance of -37dBc and a thermal resistance of only 0.38degreesC/W. GOLDMOS transistors are aimed at use in UMTS/WCDMA, GSM, CDMA, EDGE, TDSCDMA, PCS/DCS, MMDS, TV broadcast and DAB amplifiers. Initial GOLDMOS product samples will be available in Q3 2004, with full production beginning in Q4 2004.
Japan's Asahi Glass company has developed of "QC-i", a synthetic quartz photomask substrate for liquid immersion ArF lithography. The company says that QC-i can be mass-produced due to substantially reduced production costs, making it the world's first commercial substrate for ArF immersion photolithography.
The company has reduced the birefringence of the material to 1nm, compared with the 4-5nm typical for synthetic quartz photomask substrates used in dry ArF lithography. Low birefringence minimises irregularities in light polarisation.
Asahi's capacity for 6x6x0.25inch substrates is estimated at 50,000 units. A technique has been developed to reduce defects at scales of 100nm or less. Semiconductor stepper manufacturers are expected to launch mass-produced ArF liquid immersion steppers in 2005 and 2006. Asahi Glass estimates sales of QC-i at JPY1bn in FY2008.
Altera announced that it achieved first silicon success with the initial member of its Stratix II field-programmable gate array (FPGA) family. The ICs were built on TSMC's Nexsys 90nm process, featuring all-layer copper interconnect and Applied Materials' production-qualified Black Diamond low-k dielectric films.
"We have followed a strict 'design for manufacturability' methodology developed with TSMC, to address lithography issues, process margins, and power management requirements," says Francois Gregoire, vice president of technology at Altera. He adds: "We started a process three years ago that included evaluating low-k and building 90-nm test chips that validated all aspects of the technology. As a result of this systematic work with TSMC, we are very confident in the smooth rollout of our 90-nm devices."
"TSMC remains the only foundry with two generations of low-k and copper-based process technology in production," claims Genda Hu, TSMC vice president of marketing. Stratix II devices offer more than twice the logic density and 50% higher performance at 40% lower cost than the first-generation of Stratix devices.
