Info
Info
News Article

Two For The Price Of One

A new type of transistor featuring dual gates could help the semiconductor industry ensure that Moore's Law continues to remain true.

Freescale Semiconductor and the University of Florida have created the industrys first double-gate transistor model. Called FinFET, the new transistor is engineered to pack more computing power into less space and reduce power consumption while using existing semiconductor manufacturing processes.


"Double-gate transistors are becoming a serious candidate for the 45nm technology node," said Freescale chief technology officer Dr Claudine Simson, one of European Semiconductor Magazines 2005 Top Dogs (see March and April 2005 issues).


"The software model developed with the University of Florida moves it one step closer to commercialisation. This technology could enable customer applications such as smaller, lighter portable devices with longer battery life, as well as faster computing devices that can handle growing graphic, video, voice and data processing requirements."


Designers can now begin to use this technology to develop end-user products. "For the first time, the worlds of silicon technology and circuit design for the new breed of transistors have been successfully bridged," said Jerry Fossum, professor at the University of Florida. "Weve been in collaboration with Freescale on the new technologies for five years and we hope that this breakthrough and expanded collaboration will open doors to new discoveries within them."


Additionally, Freescale is driving licensing of the University of Floridas double-gate models. "Freescales license to third parties allows circuit designers to get an early look into the new double-gate devices and enable the creation of novel circuits using these models," said Simson.


"Our collaboration with the University of Florida further strengthens Freescales already strong IP portfolio in the field of multiple-gate MOSFET technologies."


The relentless drive to put more MOSFET transistors on a silicon chip by shrinking the dimensions of the transistors, commonly referred to as Moores Law, faces increasing obstacles with continued shrinkage of conventional planar transistors.


This is due to the difficulty of maintaining control of charge carriers moving through the transistor when using only a single gate. The double-gate transistor mitigates this difficulty by introducing an additional gate to enhance control, paving the way to continued shrinkage.


In order to design a silicon chip using doublegate FinFET transistors, an adequate model of the transistors electrical behaviour is required to simulate the intricate and highly complex circuitry on the chip. The double-gate transistor model developed by Freescale and the University of Florida opens the door for the design of new generations of novel microchips that will take advantage of the improved control offered by double-gate transistors.














AngelTech Live III: Join us on 12 April 2021!

AngelTech Live III will be broadcast on 12 April 2021, 10am BST, rebroadcast on 14 April (10am CTT) and 16 April (10am PST) and will feature online versions of the market-leading physical events: CS International and PIC International PLUS a brand new Silicon Semiconductor International Track!

Thanks to the great diversity of the semiconductor industry, we are always chasing new markets and developing a range of exciting technologies.

2021 is no different. Over the last few months interest in deep-UV LEDs has rocketed, due to its capability to disinfect and sanitise areas and combat Covid-19. We shall consider a roadmap for this device, along with technologies for boosting its output.

We shall also look at microLEDs, a display with many wonderful attributes, identifying processes for handling the mass transfer of tiny emitters that hold the key to commercialisation of this technology.

We shall also discuss electrification of transportation, underpinned by wide bandgap power electronics and supported by blue lasers that are ideal for processing copper.

Additional areas we will cover include the development of GaN ICs, to improve the reach of power electronics; the great strides that have been made with gallium oxide; and a look at new materials, such as cubic GaN and AlScN.

Having attracted 1500 delegates over the last 2 online summits, the 3rd event promises to be even bigger and better – with 3 interactive sessions over 1 day and will once again prove to be a key event across the semiconductor and photonic integrated circuits calendar.

So make sure you sign up today and discover the latest cutting edge developments across the compound semiconductor and integrated photonics value chain.

REGISTER FOR FREE

VIEW SESSIONS
K-Space Offers A New Accessory For Their In Situ Metrology Tools
Obducat Receives Order For Fully Automated Resist Processing Tool From A Customer In Asia
U.S. Department Of Defense Partners With GLOBALFOUNDRIES To Manufacture Secure Chips At Fab 8
ITRI And DuPont Inaugurate Semiconductor Materials Lab
TEL Introduces Episode UL As The Next Generation Etch Platform
EV Group Establishes State-of-the-art Customer Training Facility
Onto Innovation Announces New Inspection Platform
Imec Demonstrates 20nm Pitch Line/Space Resist Imaging With High-NA EUV Interference Lithography
DISCO's Completion Of New Building At Nagano Works Chino Plant
Panasonic Microelectronics Web Seminar
Belgian Initiative For AI Lung Scan Analysis In Fight Against COVID-19 Goes European
Will Future Soldiers Be Made Of Semiconductor?
AP&S Expands Management At Beginning Of 2021
New Plant To Manufacture Graphene Electronics
Tescan And 3D-Micromac Collaborate To Increase The Efficiency Of Failure Analysis Workflows
South Korean Point Engineering Chooses ClassOne’s Solstice S8 For Advanced Semiconductor Plating
ASML Reports €14.0 Billion Net Sales
GOODFELLOW Confirms Membership In The BSI UK Graphene Group
Can New Advances In CMOS Replace SCMOS Sensors In Biomedical Applications?
Cadence Announces $5M Endowment To Advance Research
Tower Semiconductor Announced Program Creating An Integrated-Laser-on-Silicon Photonics Foundry Process
Changes In The Management Board Of 3D-Micromac AG
Siemens And ASE Enable Next-generation High Density Advanced Package Designs
SUSS MicroTec Opens New Production Facility In Taiwan

Info
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
×
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in:
 
X
Info
X
Info
{taasPodcastNotification} Array
Live Event