Two For The Price Of One
Freescale Semiconductor and the University of Florida have created the industrys first double-gate transistor model. Called FinFET, the new transistor is engineered to pack more computing power into less space and reduce power consumption while using existing semiconductor manufacturing processes.
"Double-gate transistors are becoming a serious candidate for the 45nm technology node," said Freescale chief technology officer Dr Claudine Simson, one of European Semiconductor Magazines 2005 Top Dogs (see March and April 2005 issues).
"The software model developed with the University of Florida moves it one step closer to commercialisation. This technology could enable customer applications such as smaller, lighter portable devices with longer battery life, as well as faster computing devices that can handle growing graphic, video, voice and data processing requirements."
Designers can now begin to use this technology to develop end-user products. "For the first time, the worlds of silicon technology and circuit design for the new breed of transistors have been successfully bridged," said Jerry Fossum, professor at the University of Florida. "Weve been in collaboration with Freescale on the new technologies for five years and we hope that this breakthrough and expanded collaboration will open doors to new discoveries within them."
Additionally, Freescale is driving licensing of the University of Floridas double-gate models. "Freescales license to third parties allows circuit designers to get an early look into the new double-gate devices and enable the creation of novel circuits using these models," said Simson.
"Our collaboration with the University of Florida further strengthens Freescales already strong IP portfolio in the field of multiple-gate MOSFET technologies."
The relentless drive to put more MOSFET transistors on a silicon chip by shrinking the dimensions of the transistors, commonly referred to as Moores Law, faces increasing obstacles with continued shrinkage of conventional planar transistors.
This is due to the difficulty of maintaining control of charge carriers moving through the transistor when using only a single gate. The double-gate transistor mitigates this difficulty by introducing an additional gate to enhance control, paving the way to continued shrinkage.
In order to design a silicon chip using doublegate FinFET transistors, an adequate model of the transistors electrical behaviour is required to simulate the intricate and highly complex circuitry on the chip. The double-gate transistor model developed by Freescale and the University of Florida opens the door for the design of new generations of novel microchips that will take advantage of the improved control offered by double-gate transistors.