New process could speed up move to 45nm mode
Scientists working at semiconductor research consortium Sematech have identified a dual damascene method for interconnect integration that could achieve an aggressive industry target for ultra low-k dielectric materials used in semiconductor manufacturing.
The two-level metal, dual damascene process uses two Zirkon interlayer dielectric (ILD) films from Rohm and Haas Electronic Materials to demonstrate a copper/ultra low-k (ULK) integration with a k-effective (keff) value of 2.5, the target set out by the International Technology Roadmap for Semiconductors (ITRS) for the 45nm technology generation. By using ULK dielectric films and newly developed flows, the process achieves a lower k-effective result.
“The dual damascene integration that our team developed offers a potential solution for blocking precursor penetration and minimising process-induced damage typically observed with ULK dielectrics containing interconnected pores,” said Ward Engbrecht, a Sematech copper low-k integration project engineer.
Ultra low-k films are porous materials that are much less dense than organosilicate glasses, the starting material for advanced interconnect technology dielectrics. ULK is critical to advanced semiconductor manufacturing because it will allow metal lines to be packed closer together on a chip with less capacitance-driven delay, which slows chip performance. However, as previously noted by Sematech, the integrated ULK must be evaluated according to keffective, which is the overall k-value of a dielectric material and its associated layers after processing.
Throughout the late 1990s and early 2000s, the semiconductor industry drove toward developing materials with progressively decreasing k-values, but process-induced damage to these materials is becoming increasingly problematic as the industry approaches the 45nm node, which is slated to enter production in 2010.
Focusing on the challenges associated with dual damascene processing (in which metal lines and vias are laid down in a single step), the Sematech approach deposits the dielectric films by spin-on-deposition to form a matrix-porogen system that can be integrated as a dense material through chemical mechanical planarisation, Rohm and Haas's ILD process. The porogen then can be removed in a thermally-assisted ultraviolet cure process to create a system with a keff value of approximately 2.5. (This late removal of porogen avoids many issues associated with conventional processing of porous dielectrics).
“The key to achieving a keff value of 2.5 in this integration approach is the use of ultra low-k materials throughout the integration scheme except for the dielectric barriers and the minimisation of process induced damage,” said Klaus Pfeifer, Sematechs program manager for copper low-k integration.
“Our results show a process that has real promise as a solution for k-effective at 45nm,” said Sitaram Arkalgud, Sematechs interconnect director. “We will continue to refine our approach with an eye to reliability and eventual high-volume manufacturing.”
