News Article
TSMC 65-nanometer process volume production
Taiwan Semiconductor Manufacturing Company told a packed audience at its 2006 Technology Symposium that the company has fully qualified its 65-nanometer (nm) low power process technology. The announcement officially opens the doors for TSMC to deliver the production-ready 65nm process.
With several products already ramped and delivering production volumes, the new process provides higher levels of integration and performance improvement with groundbreaking power management technology for the lowest possible power usage. The new 65nm process is supported by TSMC's Design Support Ecosystem, featuring DFM-compliant 65nm products and services by TSMC's Reference Flow 6.0 design methodology and by a variety of process-proven TSMC and third-party libraries and IP. "TSMC again leads the industry in pushing Moore's law to the 65 nanometer generation," said Dr. Rick Tsai, President and Chief Executive Officer, TSMC. "At 65nm geometries, we can produce highly integrated, very small and low power devices for every conceivable market. Producing on our advanced 300mm wafers, we can ramp customers' design to high volume quickly.
