Precision MEMS Etching
Specifically, etch performance, including etch rate, critical dimensions (CDs), and profile characteristics, must be well controlled and uniform for wafer sizes up to 200mm. In addition, systems need to offer broad application flexibility, operate with high dependability and repeatability under near-continuous operation, and do this with better than 90 percent uptime and high-yielding output.
This paper discusses the chamber requirements, uniformity control, and process repeatability that will enable manufacturers to achieve their production goals for high-volume Si DRIE for MEMS applications.
Controlling uniformity of etch rate, profile, and CDs is vital to the functionality and yield of the devices. The plasma source must provide the appropriately uniform ion flux, reactive neutral flux, plasma potential, sheath characteristics, and numerous other properties that influence profile and CDs. Managing the ion energy, principally controlled by RF wafer bias, is essential for controlling etch rate, feature profile, and selectivity to the masking material. This management requires dealing with incoming material variations, RF generator instabilities and changes in the plasma characteristics resulting from the resistive load of deposited polymer.
Consistency of the process result wafer-towafer, lot-to-lot, and chamber-to-chamber is also important. One of the most challenging aspects of controlling Si DRIE repeatability is minimizing the build-up of this fluorinated polymer on the chamber walls, which negatively affects process repeatability and reproducibility. This polymer becomes a source of fluorine that returns to the plasma, modifying the gas composition . In situ chamber cleans are used to minimize these effects, reduce particulates, and increase the time between mechanical chamber cleaning .
Considerations for chamber design are complex and require careful integration of various technologies to ensure a high degree of process uniformity, repeatability, and reliability. Lam Research Corporation's production-proven TCP(r) 9400 silicon etch chamber with patented planar TCP plasma source provides an ideal configuration to meet the challenges of Si DRIE. The planar source provides exceptionally uniform ion flux without requiring separate source and diffusion chambers. This compact configuration, shown in Figure 1, also provides an efficient means for in situ chamber cleaning: the cleaning plasma can be generated to fill the volume, allowing for complete removal of any polymer depositions.
Etch rate variation across the wafer is commonly understood as the primary parameter to control for uniformity; for nextgeneration devices, other parameters must be considered as well. Profile shape, especially control of the etch symmetry and CD, is becoming more important in several applications. One of the key aspects for realizing etching uniformity is the way in which the plasma is produced and then interacts with the wafer. The high-density TCP source, comprised of the planar, induction coil and its associated chamber hardware, is specifically designed and optimized to produce this necessary process uniformity. Langmuir probe data in Figure 2 shows high uniformity of the ion density across a 200mm wafer.
Profile or feature tilting has typically been discussed as an edge effect  due to distortion of the plasma sheath near the edge of the wafer. However, fine tilt variations on the order of one half of one degree can exist due to ion density variations . These variations affect the sheath thickness across the wafer, leading to off-axis ion trajectories and profile tilting. For some applications, this level of tilt has little effect on device performance and yield. For others, in particular, many of the latest devices now entering high-volume manufacturing, even a small amount of asymmetry can lead to yield loss.
Etch asymmetry leads to undesirable, systematic perturbations  such as quadrature error for highsensitivity gyroscopes. The etched structural elements that hold the proof mass act as spring elements. When the device oscillates (drive frequency) and is subjected to rotation, some of the vibrational energy is transferred orthogonally through the Coriolis Effect. Sensors (typically capacitive combs) measure the amplitude of the orthogonally induced oscillation . When even slight asymmetry is present, the proof mass will incur out of plane motion or wobble, known as quadrature error. Quadrature error can cause inaccurate rotation rate readings, effectively reducing device sensitivity . While additional circuitry and design can limit quadrature error, the best solution is to minimize the source.
In one experiment, a manufacturer tested several conventional inductively coupled plasma (ICP) etch systems together with Lam's planar TCP system for fabricating an advanced MEMS gyroscope. This device employed a silicon-oninsulator (SOI) wafer fabrication method. Figure 3 shows SEM cross-sections of the spring structure just after the deep etch along with the measured quadrature error of completed devices. Electrical testing is required since the critical level of asymmetry is difficult to detect using cross-section SEM analysis. The high percentage of devices meeting specification for quadrature error using the TCP system demonstrates the high degree of etch symmetry provided by the planar source. This result has been confirmed with a second manufacturer that uses a non-SOI bulk silicon fabrication scheme. The graph of measured quadrature error (Figure 4) shows tight distribution around the zero point that is well within the upper and lower control limits, indicating a highly symmetric, non-tilting etch across the wafer.
The TCP 9400 etch system is designed for the CD requirements of 0.18µm devices on 200 mm wafers and produces excellent CD control on deep silicon trenches. CD uniformity has become more important for MEMS devices such as accelerometers, gyroscopes, and resonators. Specifications of <50nm CD variation are not uncommon (Figure 5).
Control of performance wafer to wafer is a function of the ability to provide the same systematic environment for each wafer combined with the ability to deal with incoming material variation. Plasma chamber cleaning (in situ) is an effective means to ensure consistency . The compact nature of the TCP 9400DSiE(tm) Si DRIE etch system allows the cleaning plasma to fill the entire chamber for efficient and rapid removal of polymer deposition. This technology has evolved since the early 1990s and incorporates the learning from more than 4,000 TCP chambers installed worldwide. Careful selection of chamber materials has resulted in elimination of non-volatile material that can resist plasma cleaning. The chamber body is temperature-controlled to minimize deposition and increases the removal efficacy during the clean. Consequently, the system can operate with a high level of repeatability for >300 RF hours without requiring a wet clean.
Etch rate and, consequently process stability, can also be affected by changes in the ion energy. As mentioned earlier, ion energy is controlled by the RF bias, ideally measured as DC bias between
the wafer and ground. This can be problematic because wafers and chucks can be insulating. Instead of sampling DC voltage, RF voltage can be sampled and controlled at the wafer . For applied RF voltages significantly greater than the potential arising from the electron temperature, the sheath voltage scales proportionately to applied RF voltage.
Consequently, voltage control is used to provide additional consistency related to variation between wafers, chamber seasoning, and across chambers (chamber matching). Figure 6 shows results from a lot of unpatterned blanket wafers with normal variations in backside films that were partially etched using standard RF power control and measured for etch rate. These wafers were etched again in the same order using voltage control (ion energy control) and showed a 2x improvement in etch rate repeatability.
In practice, by combining in situ chamber cleaning and voltage control, the TCP 9400DSiE provides consistent and predictable deep silicon etch results. The data in Figure 7 show excellent repeatability for a deep silicon trench process running more than 500 wafers as part of a tool acceptance test.
Conclusion and Summary
Production-proven planar plasma source technology can be implemented to manage key parameters impacting uniformity-such as ion flux and sheath thickness.
This leads to improved performance for uniformity of etch rate, CDs, and profile symmetry. In addition, for process repeatability, manufacturers can leverage two proprietary techniques long employed in the semiconductor industry: in situ plasma chamber cleans and ion energy control for process stability.
Armed with these capabilities, MEMS manufacturers will be able to ramp new applications to high-volume production.
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