News Article
Synopsys and TSMC announce 65-nm and memory compiler
Synopsys, Inc., was named by TSMC (TSMC), to distribute its production-ready, silicon-validated 65-nanometer (nm) Nexsys(SM) standard cell libraries, I/Os and memory compilers through Synopsys' DesignWare IP library.
Synopsys, Inc., was named by TSMC (TSMC), to distribute its production-ready, silicon-validated 65-nanometer (nm) Nexsys(SM) standard cell libraries, I/Os and memory compilers through Synopsys' DesignWare IP library.
TSMC developed the libraries in close relationship with their process development teams to ensure conformance to TSMC's design-for-manufacturing rules. TSMC validated the libraries through the TSMC-9000 program to meet their rigorous library quality criteria. TSMC and Synopsys also worked together to validate the Nexsys libraries to provide full support for the TSMC Reference Flow 6.0 within Synopsys Galaxy Design and Discovery Verification Platform.
"We worked closely with Synopsys to optimise, distribute and support our standard cells, I/Os and memory compilers," said Ed Wan, senior director of Design Service Marketing at TSMC. "It's important for our customers to get early access to fully validated IP for our most advanced processes, which accelerates the adoption of 65-nm designs."
"This significant expansion to our existing library distribution relationship with TSMC gives DesignWare Library users easy access to high-quality IP for the most advanced silicon processes," said Guri Stark, vice president of Marketing for the Solutions Group at Synopsys. "The TSMC Nexsys libraries are a key element in our broad portfolio of silicon-proven IP. Working with TSMC illustrates our commitment to provide essential IP to engineering teams worldwide for the development of their leading-edge SoC designs."
TSMC developed the libraries in close relationship with their process development teams to ensure conformance to TSMC's design-for-manufacturing rules. TSMC validated the libraries through the TSMC-9000 program to meet their rigorous library quality criteria. TSMC and Synopsys also worked together to validate the Nexsys libraries to provide full support for the TSMC Reference Flow 6.0 within Synopsys Galaxy Design and Discovery Verification Platform.
"We worked closely with Synopsys to optimise, distribute and support our standard cells, I/Os and memory compilers," said Ed Wan, senior director of Design Service Marketing at TSMC. "It's important for our customers to get early access to fully validated IP for our most advanced processes, which accelerates the adoption of 65-nm designs."
"This significant expansion to our existing library distribution relationship with TSMC gives DesignWare Library users easy access to high-quality IP for the most advanced silicon processes," said Guri Stark, vice president of Marketing for the Solutions Group at Synopsys. "The TSMC Nexsys libraries are a key element in our broad portfolio of silicon-proven IP. Working with TSMC illustrates our commitment to provide essential IP to engineering teams worldwide for the development of their leading-edge SoC designs."
