News Article
NEC develops highly-reliable metal/high-k gate stack transistor
NEC Corporation (NEC) announced the joint development of a new technology for realising low-power and high-performance SOC devices of technology nodes of 65 nm, 45 nm and beyond. The developed technology enables fabrication of a highly reliable metal/high-k gate transistor utilising a simple method.;;
This research result was achieved by the following:(1) Use of a highly reliable HfSiON (Hf) high-k gate dielectric film and a Ni-silicide gate electrode that is compatible with conventional processes.(2) Clarification of the impact of the crystalline phase of a Ni-FUSI gate electrode on long-term reliability.(3) A combination of NiSi (n-FET) and Ni3Si (p-FET) is adopted to ensure reliable performance.(4) A newly developed method realises control of the thickness of the silicon for the silicide formation, thereby enabling clear definition of the crystalline phase of NiFUSI, even in short channel gates.(5) While controlling the height of the gate electrode, compressive force was intentionally applied to the p-FET channel region, enhancing mobility of holes.To date, there have been several issues with metal/high-k gate stacks including the maintenance of stable current output after prolonged operation, which has not been realised due to increased current leakage through the ultra-thin gate stack. The newly developed technology solves this major issue, in addition to lowering production costs owing to the simple process and high uniformity in transistor performance. This is a large step toward the realisation of low-power-consuming devices with a metal/high-k gate stack, prolonging the battery life of mobile equipment.
