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News Article

Si2 announces formation of low-power coalition

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Silicon Integration Initiative (Si2) announced the formation of the Low-Power Coalition (LPC) which will deliver enhanced capabilities in low-power Integrated Circuit (IC) design flows relating to specifications of low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability.

The intent of the LPC is to develop a unified system approach to low power chip design covering the entire design flow, incorporating all applicable standards as necessary. Founding members of the LPC are currently being finalized and will be announced at a later date. All interested parties are invited to join this effort.

The LPC will work to integrate existing open formats and new contributions into complete adoptable flows, and provide critical solutions support including market education and outreach, enabling software, and technical support. Si2 will apply dedicated technical staff resources to the LPC, and collaborate with other relevant groups, including Accellera, the SPIRIT Consortium and other industry organizations.

"Si2 members have underscored the criticality of integrating enhanced low-power capabilities into multi-vendor design flows," said Steve Schulz, president and CEO of Si2.

"The LPC not only addresses immediate low-power flow concerns, but also targets further optimizations and enhancements for reusable IP blocks and upstream migration of low-power intent. Si2 looks forward to working with the LPC and other industry organizations to drive adoption of a standard supporting low power design for the industry. All who share an interest in low-power chip design are encouraged to join us in the LPC."

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