Applied Micro Circuit selects Mirabilis for advanced SoCs and Subsystems
AMCC selected VisualSim for the comprehensive modelling libraries which range from base queuing, scheduling and algorithmic building blocks to high function components such as, DDR2, processor cores and DMA.
AMCC has been able to use VisualSim to rapidly capture the system description and conduct performance analysis of the SOC and subsystems at the queue, scheduler and algorithm level of abstraction.
"Using VisualSim at AMCC, we have been able to accelerate our architectural design and validation process." said Chris Bergen, Network Chief Technology Officer at AMCC.
"The functionality within the VisualSim library enabled the rapid development of a high-level SOC model allowing architectural validation through a host of dynamic traffic and process work loads. This provided feedback on key performance metrics including latency and utilization of shared resources, work queue build up and Quality of Service (QOS) efficiency throughout the SOC. The analysis validated the architecture choices, profiled the system performance and provided key metrics to the design leads at an early stage of the SOC development process."
AMCC will use VisualSim standard modelling libraries to create custom and standard SoC components. Proven VisualSim graphical libraries jumpstart model development and facilitate team communication and understanding.
