Wafer Processing

Single-Wafer recycling processes

The ability to regenerate and reuse wafers provides a potential cost savings mechanism for today’s manufacturing fab. In the backend of line (BEOL), in particular, there is a great opportunity to recycle both monitor and short-loop wafers. Semiconductor Manufacturing International Corporation (SMIC) presents the use in a single-wafer recycling application for the 300-mm process line. By Alex Zhang1 Jack Kao1, Tony Pei1 Hao Liu2, Helen Qian2, Leo Archer3

Cost is becoming an increasingly important issue in semiconductor fabrication. This is particularly true in device manufacturing. It is no longer sufficient to merely control costs, rather there are increasing efforts at actual cost reduction. This has become extremely critical, especially at semiconductor foundries. A variety of different product lines and razor-edge margins make cost efficiencies absolutely paramount. Effective use of resources and stable processes are part of the key to enabling cost control and reduction. As a result, these factors have been part of the driving force behind the migration away from batch processing to single-wafer processing given the latter’s inherent flexibility and low consumables usage.

Bare (blanket) silicon wafers are the fundamental backbone of semiconductor processing. Beyond their use as device substrates, they are used extensively for non-product applications such as inline monitoring and daily qualification checks. Furthermore, a large number of wafers are used for engineering purposes as part of process development. These so-called short-loop wafers are typically processed through some subset of the total process flow and represent a snapshot of process reliability for particular parts of the overall flow. They can be used for performance and reliability tests and are then typically recycled for use in subsequent process development.

SMIC has developed an innovative recycle process utilizing single-wafer wet processing technology, which provides an attractive and costefficient alternative to conventional batch recycle processes. The processes produce wafers of sufficient quality for reuse in backend-of-the line (BEOL) development and process monitoring. This article presents an overview of the recycle process highlighting key performance indicators and observed cost reductions.

Single-Wafer Processing Setup
The recycle process is performed on an SEZ Spin Processor 323 configured for 300-mm processing. The tool contains three different chemical processing levels that allow for dispense and recirculation of three different chemical blends onto a spinning substrate. The dispense characteristics such as dispense profile, wafer-spin speed, and media temperature can all be tightly controlled. The wafer sits upon a patented Bernoulli chuck that allows for selective media dispense on one side of the wafer while allowing the other side to be untouched. This is very important as it eliminates many of the mechanisms of defectivity transfer (particles and ionic) that are inherent to batch (bench) systems. In the case of a recycle process, this is very advantageous as it facilitates reuse of the recycled wafers for more defect-sensitive applications. In addition to the chemistries, there is a fourth process level for deionized (DI) water and N2 drying. The rinse water is enhanced with ozone by means of an external ozone generating module. This additional feature is a critical part of the SCROD process, which when alternated with DHF enables the removal of defects from the wafer surface.

The complete BEOL recycle process involves the removal of the interconnect materials stack and preparation of the bare silicon surface. In this recycling approach, these steps can be accomplished with the use of two chemical blends and an enhanced DIO3 rinse. The equipment configuration is highlighted in Figure 1.

The configuration allows for a variety of potential processes for different applications that can be run on the same piece of equipment with the same basic setup and chemistries.

Results
There is an important distinction made at SMIC between recycled and reclaimed wafers. Wafers that can be processed to have sufficiently low defectivity and acceptable surface characteristics are recycled over and over. Once the wafers have deteriorated beyond the point that they can be successfully recycled, they are sent for reclaim. The usual driver for this is failure of the defectivity specification. The reclaim process involves the use of chemical mechanical planarization (CMP) in order to return the wafer surface to an acceptable state. This is an expensive process, and results in considerable silicon loss. However, this is a key factor that distinguishes recycled from reclaimed wafers. There are a variety of products manufactured at SMIC and in many cases these have different integration schemes. However, a generic test scheme is represented below in Figure 2 for a typical BEOL logic stack reported in this article. The wafer sees the respective chemistry to remove the films sequentially through the stack. The recycling process is analyzed under three different scenarios: 1) removal of the copper (Cu) and barrier from oxide on silicon, 2) removal of low-k dielectrics from silicon, and 3) preparation of the bare silicon surface.

Scenario 1: Copper Film Removal
During this recycle process, the first step is the removal of copper and barrier layers. In simplified stacks, where there is no low-k present, the barrier lands on a plasma-enhanced oxide (PEOX) film. In this case, a 50:1 nitric acid/HF mixture can effectively remove the copper and barrier. Typically, this process takes about 20 seconds. However, there is an over-etch time of approximately 10 seconds to remove some of the PEOX in order to compensate for any diffused copper. Typically, the copper is removed too quickly to measure an exact etch rate. However, a rapid colour change takes place and is an approximate measure of process completion. Total X-ray fluorescence spectroscopy is used to verify performance. Representative results are highlighted in Figure 3. This process sequence is followed by SCROD/HF sequencing to remove the remaining PEOX film and to prepare a clean silicon surface.

Scenario 2: Low-k Film Removal
We present a process that involves synergistic dryand wet-process sequences to remove low-k films. Prior to its introduction, wafers used CMP to remove the low-k film. The CMP process resulted in significant loss of silicon during processing and led to significant loss of wafers due to wafer breakage. The novel alternative approach involves a wet/dry/wet process sequence.

Initially, attempts were made to use straight 49% HF to strip low-k films. The films are typically carbon-doped oxides (CDO). A series of process times and temperatures were evaluated and initially it appeared that it was possible to remove the films in very short times—as quick as 10 seconds. A sample that was processed for 60 seconds was used for surface characterization. Figure 4 shows process effectiveness using three different analytical techniques.

The far left image is the defectivity map, postwet clean. Scanning electron microscopy (SEM) of these defects (centre image) shows that they are surface particles rather than scratches or pits. Their composition is confirmed to be carbon (right image) by energy dispersive X-ray spectroscopy (EDX). It appears that HF is incapable of completely removing the carbon contamination associated with the CDO film at the interface to the substrate.

To address the carbon contamination issue the film is exposed to a plasma environment in the presence of oxygen. This volatilizes the carbon contamination and makes the surface hydrophilic. The last step is to perform a SCROD/HF process to remove defects. The defectivity count is significantly reduced and the only remaining defects are surface pits rather than particles. The pits are present prior to the recycle step.

Scenario 3: Bare Silicon Recycle
As was stated earlier, there is considerable use of bare Si wafers for non-manufacturing purposes. These wafers can be recycled and reused for similar purposes. The specifications for reuse set targets of less than 100 defects at 0.16-µm per wafer, and less than 10 defects at 1.0-µm per wafer. In general, the process produces significantly better results than the target specifications. However, defectivity is not the only concern.

Prior to the recycling process, these wafers have seen many different process equipment types in diverse modules. As a result, wafers frequently have different surface termination, some being hydrophilic and some being hydrophobic. A different approach to cleaning each surface type is necessary. The SCROD/HF process works well on hydrophilic surfaces.

Hydrophobic surfaces are more difficult to clean. Effective wetting of the wafer surface can be a major challenge. Despite the tight control of fluid dispense characteristics, there is a unique defectivity profile observed on the wafers after cleaning. Figure 5 shows defectivity measurements before and after the first DIO3/HF step. The before-clean (a) map shows a series of random defects. Normally, the DIO3 step will grow several angstroms of oxide on the surface. The subsequent HF step removes the oxide and many of the surface defects. However, in this case, the resulting defect map shows a significant increase in the number of defects as shown in the post-review map (b).

During the wet processing of hydrophobic wafers, we observe that there is very poor wetting of the wafer surface. For these, the surface termination was modified making it hydrophilic instead of hydrophobic. Just as in the case of CDO low-k wafers, the wafers are exposed to plasma in an oxygen environment prior to the SCROD/HF process.

This results in the formation of a hydrophilic oxide surface. The DIO3 can then easily wet the wafer surface and the subsequent HF step can etch the surface removing defects with each successive etch. The impact of the plasma treatment on the success of the SCROD/HF recycle process was monitored over a two-month period in the Fab4C production line. The addition of the plasma step almost doubles the wafer success rate from 46% to 91%.

Process Performance – Single Wafer vs. Batch
The wafer recycle processes that were being performed at SMIC were traditionally done in batch mode in a wet bench. A comparison of the process times between single-wafer and batch processes is shown in Figure 6.

There are immediate differences that can be observed in the process times:
● In the case of some of the films where it is possible to use either a single-wafer or batch approach, the batch process is shorter than the single-wafer. However, this is typically due to the fact that the batch tool has a higher maximum process temperature than the equipment generation of the Spin Processor that is used for this process at SMIC.
● Low-k and copper films cannot be processed in a wet bench due to the cross contamination concerns.

While the number of defects is a major concern for this process, so is the type of defects. The wafers processed in the single-wafer tool do show some surface pitting, as do wafers processed in the wet bench. However, the latter also suffers from a larger number of particles on the surface. This can cause problems when these wafers are reused, particularly for monitor applications.

Carefully monitoring the types of defects that exist after the recycle process is important. It helps to improve the actual recycle process and to determine the applications for reused recycled wafers. As a rule, wafers that have been exposed to copper stay segregated from non-copper wafer flows, even after recycling. Eventually, after as many as 20 recycle flows, wafers must be sent for reclaim or be scraped.

Cost of Ownership (CoO)
The single-wafer recycle process provides both performance and cost advantages over both batch recycling and recycling that involves CMP. The footprint, use of consumables, and use of DI are lower in a single-wafer tool than in a wet bench. However, another significant cost advantage in a single-wafer tool is the ability to recirculate and reuse the process chemistry.

Analysis of the data has shown that the total consumption of media in the single-wafer recycle process is less than 100 mL/wafer compared with approximately 175 mL/wafer in a wet bench. Also, the use of DI is approximately 20 percent of that of the wet bench. Given that a wafer, on average, can be recycled 20 times in a singlewafer recycle process versus 12 times in a batch process, there is an observed savings of almost 40 percent between the single-wafer and batch approach. This produces a significant cost savings to the fab.

Conclusion
As the semiconductor industry matures, there is increasing emphasis on cost savings. Resource management and process innovation are increasingly sought. Wafer costs and usage account for a large portion of the costs of running a fab. The ability to reuse wafers through multiple process cycles is extremely important. We have presented a novel single-wafer recycling process that allows for the regeneration of wafers for both engineering development and for use in process monitoring.

The process uses two simple chemical mixtures to strip films and prepare bare silicon wafers for reuse. The processes remove metal and other unwanted materials from BEOL wafers with a simple poly-mix solution of HF and plasma – leaving wafers that can be processed with a SCROD/HF approach to remove surface defects, and preparing the wafers to be returned into the fab. The single-wafer approach exceeds the capability of standard batch (wet bench) abilities and provides affordable, cost-effective solutions. We believe that this often overlooked application will become progressively more important as manufacturing costs continue to rise.

Reference
1. Semiconductor Manufacturing International Corporation, Fab 4C, Beijing, China
2. SEZ China, Shanghai, China
3. SEZ AG (USA), Phoenix, Ariz. USA