Info
Info
News Article

MicroNanoSystems

News
Advancing state-of-the-art in FinFET’s
IMEC presents some promising results.

Advancing state-of-the-art in FinFETs


Recently IMEC presented significant progress in the manufacturability, circuit performance and reliability of FinFETs. The results advance FinFET process technology towards being a candidate for the 32nm node and beyond.


FinFETs are a promising approach to address short-channel effects and leakage issues when scaling CMOS towards the 32nm node and beyond. Doping fluctuations in nano-scale planar devices are one of the several concerns in further scaling, while FinFETs have the potential of being able to operate without channel dopants. IMEC has improved its process to yield reproducible FinFETs with fin widths down to 5nm and high aspect ratio using 193nm immersion lithography and dry etching. By using these ultra-thin body devices, the need for channel doping is eliminated. This results in reduced parametric spread due to dopant fluctuations together with reduced junction leakage.


""


FinFET Circuits V Bulk CMOS Circuits
Analysing various circuit topologies, IMEC demonstrates experimentally that the performance of FinFET circuits is superior to bulk CMOS circuits and satisfies future digital library requirements. A ring oscillator has been realised with metal gates and un-doped fins showing an inverter delay of 13.9ps at a 1.0V supply voltage and 1.9nA off current. This best low-power performance of FinFETs ever reported results from the undoped channels and improved subthreshold characteristics. Next to the excellent inverter delay, FinFETs provide an extra performance benefit due to their excellent stacked device performance. They allow realising higher stack heights whereby the same functionality can be implemented with less logic gates resulting in additional area reduction.


The potential of FinFETs for large-scale integration has also been demonstrated. To this end, SRAM cells and data path demonstrators with low standby current and good low operating power performance were realised.


Progressive Technology
The reliability characteristics, both NBTI (negative bias temperature instability) and PBTI (positive bias temperature instability), of the FinFETs have been significantly improved by dielectric passivation based on introducing fluorine into the metal/Hf-based gate stack during gate etching. To this end, IMEC developed a novel, effective and cost-efficient method that requires no extra processing step.


""


“Although the performance benefits of FinFETs have been recognised for many years, several bottlenecks have to be overcome to bring FinFET technology to manufacturing. These advances have reduced the gap for FinFETs to become a manufacturing technology,” said Luc Van den hove, COO IMEC.


These results were obtained in collaboration with IMEC's (sub-)32nm CMOS research partners: Infineon, Qimonda, Intel, Micron, NXP, Panasonic, Samsung, STMicroelectronics, Texas Instruments, TSMC and Elpida.



AngelTech Live III: Join us on 12 April 2021!

AngelTech Live III will be broadcast on 12 April 2021, 10am BST, rebroadcast on 14 April (10am CTT) and 16 April (10am PST) and will feature online versions of the market-leading physical events: CS International and PIC International PLUS a brand new Silicon Semiconductor International Track!

Thanks to the great diversity of the semiconductor industry, we are always chasing new markets and developing a range of exciting technologies.

2021 is no different. Over the last few months interest in deep-UV LEDs has rocketed, due to its capability to disinfect and sanitise areas and combat Covid-19. We shall consider a roadmap for this device, along with technologies for boosting its output.

We shall also look at microLEDs, a display with many wonderful attributes, identifying processes for handling the mass transfer of tiny emitters that hold the key to commercialisation of this technology.

We shall also discuss electrification of transportation, underpinned by wide bandgap power electronics and supported by blue lasers that are ideal for processing copper.

Additional areas we will cover include the development of GaN ICs, to improve the reach of power electronics; the great strides that have been made with gallium oxide; and a look at new materials, such as cubic GaN and AlScN.

Having attracted 1500 delegates over the last 2 online summits, the 3rd event promises to be even bigger and better – with 3 interactive sessions over 1 day and will once again prove to be a key event across the semiconductor and photonic integrated circuits calendar.

So make sure you sign up today and discover the latest cutting edge developments across the compound semiconductor and integrated photonics value chain.

REGISTER FOR FREE

VIEW SESSIONS
EV Group Establishes State-of-the-art Customer Training Facility
South Korean Point Engineering Chooses ClassOne’s Solstice S8 For Advanced Semiconductor Plating
Siemens And ASE Enable Next-generation High Density Advanced Package Designs
GOODFELLOW Confirms Membership In The BSI UK Graphene Group
K-Space Offers A New Accessory For Their In Situ Metrology Tools
Changes In The Management Board Of 3D-Micromac AG
SUSS MicroTec Opens New Production Facility In Taiwan
ASML Reports €14.0 Billion Net Sales
TEL Introduces Episode UL As The Next Generation Etch Platform
U.S. Department Of Defense Partners With GLOBALFOUNDRIES To Manufacture Secure Chips At Fab 8
Will Future Soldiers Be Made Of Semiconductor?
ITRI And DuPont Inaugurate Semiconductor Materials Lab
Onto Innovation Announces New Inspection Platform
DISCO's Completion Of New Building At Nagano Works Chino Plant
Obducat Receives Order For Fully Automated Resist Processing Tool From A Customer In Asia
Belgian Initiative For AI Lung Scan Analysis In Fight Against COVID-19 Goes European
Can New Advances In CMOS Replace SCMOS Sensors In Biomedical Applications?
Tower Semiconductor Announced Program Creating An Integrated-Laser-on-Silicon Photonics Foundry Process
Tescan And 3D-Micromac Collaborate To Increase The Efficiency Of Failure Analysis Workflows
Imec Demonstrates 20nm Pitch Line/Space Resist Imaging With High-NA EUV Interference Lithography
Panasonic Microelectronics Web Seminar
AP&S Expands Management At Beginning Of 2021
New Plant To Manufacture Graphene Electronics
Cadence Announces $5M Endowment To Advance Research

Info
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
×
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in:
 
X
Info
X
Info
{taasPodcastNotification} Array
Live Event