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Exception discusses the impact of the introduction of ball grid arrays on the PCB manufacturing industry

Small, fast and good:
How the PCB sector is rising to the challenge set by the semi-conductor industry

Many of the big players in the semiconductor sector, Texas Instruments, Intel, ST Micro and Freescale, to name but a few – are all busy developing the next generation of micro BGAs, known as silicon in the industry. Garry Myatt, sales and marketing director of Exception PCB looks at changes in the semiconductor sector and how leading PCB fabricators are rising to the challenge.

As both fab-less and fabs vie for supremacy in their chosen niche markets, be it GPS, wireless applications or power distribution, the need for smaller chips becomes central to success or failure. As the adoption of micro ball grid arrays (BGAs) becomes more widespread, the ability to test silicon becomes increasingly difficult. Clearly, specialist boards need to be developed as part of a package that the major chip manufacturers can sell to global OEMs in such markets as mobile telecoms, consumer electronics and RF communications.

The production of reliable test boards (or reference designs) to accompany the initial supply of prototype chips is a key element of the bigger picture. Without the promise of the improved silicon and the board to analyse and test its performance, the chip will never go on to large scale production, where the real profits are recouped when their production runs rise to tens of thousands, not a handful.

Clearly, as the level of complexity rises, so the number of PCB test board partners able to deliver this type of support diminishes. Investment in technology is a key pre-requisite to playing in the chip market. Access to laser direct imaging to allow true-definition of fine traces and spaces is vital as this technique also accommodates the use of defining fine pad features at copper stage and at solder mask.

Defined registration techniques also enable connection to connection, pad to pad and layer to layer interconnectivity, which is one of the central building blocks of reliable, test-ready
silicon.

Cutting edge technology
In order to achieve the elusive sub-75 micron vias, the latest laser drilling technology is used. This method allows very accurate drilling through multiple dielectric and laminate materials be it FR4, HiTG FR4, BT epoxys or ceramics.

Defined and proven plating processes are another important capability that any HDI manufacturer operating in this specialised field needs to provide. The highly complex work of copper filling micro-via towers and copper filled SMT pads is a cornerstone of this sort of solution, that can now be provided by just a handful of companies world-wide.

To improve the efficiency and fan out of micro BGAs within the board – be it an IC substrate, reference design or load/probe test board - we are increasingly seeing the adoption of more layers within the PCB design. This can include increasing the number of layers from six to twelve or even sixteen to accommodate high speed data transfer and the sheer volume of I/O needed to be handled by the dictation of multiple micro BGAs within a single platform PCB.

“Possibly even more important than the number of layers employed are the materials used. Moving from standard FR4 materials (gauged by their fire resistance), to lead-free, BT Epoxy and ceramic laminates can significantly improve the efficiency of a board. This decision obviously has a cost implication, but the use of new, exotic materials to improve processing power is increasingly being adopted in highperformance, high-reliability situations.

Market adoption
Due to the ongoing influence of miniaturisation through competition, suppliers to the global semiconductor sector are adopting the use of high density micro BGAs as an integral part of the BOM (bill of materials) and placement within a PCB. Gone are the days of technology pushing to fabricate PCBs to support 1mm pitch devices. Instead the challenge is 0.4mm and below with flip chip and CSP features knocking at the doors. It is interesting to note that it is the semiconductor world leading the market with widespread adoption among designers in all market sectors adopting to support as leading fab and fabless providers continue to release demanding high performance silicon.

Developments that are gaining credibility among chip designers is the micro-via and flat pad technology, which was seen as high risk and too expensive by most non semi OEMs in the market until fairly recently. Traditionally, many in the industry have categorized micro-vias’ only benefit as a replacement for micro devices such as Chip Scale Packages (CSPs) and BGAs, but this is simply not the case.

There are many benefits to micro-via technology that are only now gaining real credibility among fabricators. Recent studies have proved that micro-vias can be used as a means of increasing routing density, which reduces the amount of layers required to complete a PCB design. Also, CSP devices are now becoming cheaper than their through-hole counterparts – so although the bare PCB may be slightly more expensive, the measurable cost savings are realised, later at the assembly stage, especially with the adoption of flat pad.

As time and technology have progressed, so has the development of micro-vias. Even with standard micro-via usage, devices such as 0.40mm micro BGAs have become almost impossible to “track out” due to the limits of laser drilling technology. To address this issue we have developed a micro-via tower process (eXMVT) whereby standard micro-vias are placed directly on top of each other, thus reducing via diameter, increasing routeing density and due to the via being filled with solid copper, aiding thermal transfer from the outer layers throughout the construction.

Indeed, while the eXMVT process is seen as an innovation, it is fast becoming a necessity in today’s demanding niche sectors.

Related to the development of micro-vias is the increasing adoption of flat pad (eXFPT) technology. While the process of via in pad for micro-vias is very well used, it does introduce potential process problems during BGA assembly.

The existing micro-via leaves a small indent or dimple in the surface pad, which can lead to voids or ‘out gassing’ during assembly. The cure for this at design stage is to use the conventional “dog-bone” pad-track-pad, whereby one via contains the surface pad, while the other includes the micro-via hole.

“This method vastly reduces routing density once more. If the eXMVT process is used, the laser ablated hole can be placed in the surface pad position, filled with copper and polished flat. The result is a completely flat pad (eXFPT), on which the device can be placed without the concerns evident with the standard micro-via – absolutely critical on semiconductor reference designs when evaluating the first cut of silicon.

With this range of services, Exception is currently supporting over 60 fab and fab-less semiconductor companies worldwide. This investment in both technology and expertise over a period of years has achieved a “win-win” scenario for the sector, where high quality and quickturn solutions are no longer mutually
exclusive.

Indeed this offering suits European start-ups during ‘incubation’ that are nervous about working with Asian manufacturers for IC Substrates, given the requirement for high volumes and the inherent supply chain problems associated with time critical, short batch production.

Clearly, the growth of this type of service to the sector is a reflection of the need for a quality provider that can provide short run IC substrates, reference designs and load test boards in a matter of days, not weeks. Certainly, once a chip goes into full production, economies of scale need to be achieved via an offshore route, but this design-stage service fills an important gap in the semiconductor market.

In addition to this service, Exception has also developed a network of wire bond and die attach packaging partners that can support first offs in five to 15 days. This offers new entrants to the market a far less risky way to provide that vital prototype run off 100 to 100,000 dies packaged that can be tested and evaluated before moving onto volume production

While we are seeing significant growth in the market to offer this quality and speed of service to new entrants to the market, we are also seeing increasing demand from semiconductor players that require an overflow fabrication facility that can provide product in a matter of days, not weeks. This high quality, quickturn service is the area where European based HDI fabricators maintain competitive edge in a global market.

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