European Research

Ask Gilbert Declerck, President and CEO of Belgium based IMEC, what is the key factor to the success of this unique research organisation and he is quick to answer that it is the independence of IMEC that provides its strengths. There is no doubt that IMEC has gone from strength to strength since a team led by Professor Roger Van Overstraeten started the non-profit organisation in 1984. There is also no doubt that many other collaborative efforts around the world have suffered from a lack of independence from behind the scenes boardroom struggles for control from participants. IMEC maintains its unique business model based on sharing cost, risk and IP.

The statistics for IMEC are impressive and the growth of this 23 year institution has been constant with expansion into new areas of microelectronic capabilities every year. IMEC began with an initial investment of €62 million from the Flemish government and had 70 staff. One of the initial goals was to make sure the institution was self funding through the charges it made to participants as well as returns on licenses and products developed. In 2007 IMEC will have revenue of approximately €240 million and a staff of 1550. Government and state funding still account for around 16% with €39 million of the revenue coming from the Flanders government. To ensure this money is not a handout the government has carried out a number of impact studies to see what effect IMEC has had on the local economy. All have been positive enough for them to continue investment.

When you are a non-profit organisation it enables you to re-invest constantly into your programmes and increase your capacity. IMEC has certainly done this and continues to live up to its mission statement to perform research and development, ahead of industrial needs by three to ten years, in microelectronics, nanotechnology, design methods and technologies for ICT systems. Of course that originally said microelectronics but the constant changes in the industry means change for IMEC and their mission statement with the institute involved in an increasing number of programs across traditional and emerging microelectronics as well as solar energy.

Declerck was happy to announce to the assembled journalists that IMEC has signed a new frame agreement with the Flander’s government for 2007 to 2011 the total of government grants for these five years equalling €210 million but the total IMEC budget over this period of five years is expected to €1.2 billion. IMEC is more than a European success story now as 85% of the expected external funding of €1 billion will originate from abroad.

The collaborator collaborates
As IMEC has grown so has it collaboration efforts. IMEC no longer just invites companies to its centre but actively sets up co-operation and collaboration efforts around the world with a variety of companies, universities and research institutes as well as setting up a satellite group in the Netherlands and offices in the USA and parts of Asia. IMEC is also actively involved in almost every European collaboration programme, many of them through the auspices of the European Union’s Framework Seven programmes.

A key new collaborative effort is between IMEC and the Microsystems Packaging Research Centre at the Georgia Institute of Technology (PRC) to look at the challenges facing packaging and interconnect. The duo has sent out an open invitation for interested parties to join their advanced research program on next-generation flip-chip and substrate technology. The programme will address the key ‘IC-to-package to board’ packaging interconnect issues for 32nm ICs and beyond.

The collaborative effort aims to explore and develop:
1. Organic package interposer substrates that minimise stress at die and package level and enhance the wiring density, the fine I/O pitch routing capability and the high-frequency signal performance of substrates,
2. A new generation of fine-pitch flip-chip UBM (under-bump metallisation) and barrier metallisation that meet the electromigration and thermo-mechanical reliability targets of flip-chip scaling,
3. Novel solder and non-solder interconnect approaches including advanced underfill materials and processes to meet future current density, geometry and reliability requirements,
4. Thermo-mechanical modelling, design and verification for improved reliability.

“We are excited to start this unique open program with PRC where we intend to bring together 20-30 expert researchers from industry and academia worldwide,” said Eric Beyne, Program Director Interconnect, Packaging and Systems Integration at IMEC. “Only by joining expertise and know-how from leading players in the packaging and semiconductor field, we will be able to realise highly reliable solutions beyond the traditional flip-chip interconnections.”

Shining light
IMEC has possibly become the key research centre for future lithography outside of Asia and the presentation by the director of the Advanced Lithography Programme, Kurt Ronse, showed they are maintaining their edge. The big news for IMEC was the announcement that they are to acquire an EUV pre-production lithography tool from ASML for research on 22nm CMOS manufacturing. The tool is due to be installed in IMEC’s 300mm facility in 2010.

The installation of the pre-production tool follows ASML’s alpha-demo tool (ADT) at IMEC from which first high-resolution images were obtained with a Sn source at the end of September. Despite the progress Ronse made it clear they are a long way off productive manufacturing with the light source and materials cited as the two biggest challenges.

Ronse also provided an update on the state of the immersion and double patterning lithography stating good progress with immersion lithography but does not see the current process being able to cope with 32nm requirements and unless new materials can be used to bring the numerical aperture closer to 1.6 then double patterning with immersion lithography is the current fore runner for lithography at 32nm. The programmes are studying a number of potential fluids to improve the aperture but a number of challenges remain, most notably absorption. Double patterning has its own challenges and work is continuing to ensure costs are driven down enough to make it a viable option.

K values
Not so long ago the semiconductor industry believed that the lowest k value that devices could achieve was 2.5 but Rudi Cartuyvels, department director of interconnect technology and technology options, discussed how IMEC were integrating k=2.3 materials in manufacturable devices using plasma-enhanced chemical vapour deposition (PECVD). This breakthrough is once again the result of the collaborative efforts that can be achieved by the IMEC group as they have representatives from all IC manufactures and suppliers working together on the issue with pre-work agreements ensuring useful collaboration rather than inter-company fights over the results.

Cartuyvels outlined the scaling challenges for interconnect at and below 32nm as follows,

• Higher porosity with pore size < 2nm in intermetal dielectric
• Mechanical strength of low-k dielectric
• Ability to seal exposed low-k surface
• Limit integration induced low-k damage
• Lower – k dielectric barriers
• Thinner metal barriers compatible with low-k
• Thinner Cu seeds
• Defect free, thin, planar overburden Cu fill
• Low down force CMP
• Low resisitivity Cu in narrow features

Cartuyvels stated maintaining pore size < 2nm at high porosity is challenging but Zeolites offered attractive mechanical properties but low k value needs to be proven before it can be incorporated into the manufacturing process. Most of the work in this area is focused on new materials and reducing damage from processes such as CMP, plasma and wet strip. The group contributors are all seeking alternatives to organic solvents and would prefer a single wet process solution requiring a single wet chemical.

Cartuyvels was asked what he thought of porous free material solutions and he stated that any company claiming they have porous free materials as a solution to any manufacturing challenge could not be telling the truth as such materials were not technically feasible.

Three dimensional connections
The extreme miniaturisation of transistors requires innovative packaging and interconnection approaches. IMEC already develops a multilayer thin-film technology, which consists of multiple thin layers of metal and dielectric materials. The same technology can be used to protect vulnerable structures like MEMS in the early stages of packaging. To make even smaller systems with increased functionality, IMEC now has several activities on 3D-integration and (ultra-thin) chip stacking. All this expertise is assembled in IMEC’s Advanced Packaging and Interconnect Centre (APIC).

The key driver behind the industry push for 3D interconnects is the cost savings but experts gathered for a panel on the topic made it clear that there are benefits to interconnecting devices that go well beyond cost alone. In view of such potential IMEC recently extended its 3D system integration program to fully exploit the potential of novel 3D technologies.

Besides 3D interconnection technologies developments, the programme has now been extended with research on system design methodologies. Both the technology and design sub-programs will be based on actual system requirements and closely coupled.

Depending on the application and the systems requirements, a specific 3D solution needs to be chosen. In the future, IMEC intends to extend its 3D system technology program with a 3D IC program which will investigate wafer stacking for interconnects at the IC local interconnect level. IMEC will base its research in this field on actual system requirements such as cost, testability, functionality and power. For this reason IMEC also added a design technology sub-program in which system architectures will be revised.

“3D integration shows promise to become the ‘holy grail’ for system integration with applications ranging from electronics for consumer, automotive, medical, office and networking applications.

It offers higher transistor density, faster interconnects, integration of heterogeneous technologies and consequently an increase of system functionality,” said Luc Van den hove, Executive Vice President and Chief Operating Officer at IMEC.

Long but fruitful journey
As a journalist in the microelectronics industry you have to attend many seminars and trips and keep up with a vast array of information. The annual sojourn to IMEC is always an eye opener and a pleasure as each year I am pleasantly surprised at the growth and progress. I have been covering IMEC for nine years now and watched the standing in the international community grow to the point where it is fair to say they are one of the most recognised and respected organisations in the microelectronics world.

Every year I am overwhelmed at the amount of activity going on at IMEC but always enjoy being around such a vibrant hive of research activity. I have only covered a small section of what we we are shown and will have to look at some of the other issues in a later edition.

Considering the one thing Belgium was lacking when the Flanders government embarked on this audacious project was an indigenous microelectronics industry, it has become a benchmark in industry collaboration that is now looked upon by other regions as they develop their own research capacities.