News Article
Aixtron participates in sub 22nm CMOS development
Aixtron announces its participation in a new semiconductor research project, which will exploit the synergy benefits of germanium pMOS, and III-V compound semiconductors in CMOS circuits.
The project is entitled ‘Dual channel CMOS for sub-22nm high performance logic' (Duallogic) and began on December 1, 2007, with duration of three years. The Duallogic research project includes besides Aixtron, chip companies and research institutes from Europe; it will be led by the National Center for Scientific Research DEMOKRITOS (NCSR) in Greece.
Other partners include IMEC, NXP Semiconductors N.V., The Katholieke Universiteit Leuven in Belgium; Commissariat à l'Énergie Atomique (LETI), STMicroelectronics in France; The University of Glasgow in the United Kingdom; and IBM Research GmbH in Switzerland.
The project aim is the development of a dual channel CMOS technology comprising high channel mobility Ge pMOS and III-V compound semiconductor nMOS transistors co-integrated on the same complex engineered substrate on silicon. This will provide a considerable performance boost option for prospective 22nm geometry technology and a major competitive advantage for the European nanoelectronics industry.
"By mobilizing Europe's major technology development laboratories along with leading players from the IT industry, semiconductor and key semiconductor equipment manufacturers, this project will be a catalyst to furthering competence in manufacturing and IP in Europe," comments Dr. Athanasios Dimoulas, National Center for Scientific Research DEMOKRITOS.
"As part of the Duallogic team Aixtron will deliver a cluster tool for III-V devices," says Prof. Dr. Michael Heuken, Aixtron's Vice President Corporate Research and Development. "This will be installed at IMEC's state of the art cleanroom facility in Belgium. Aixtron researchers will be working closely with IMEC staff to achieve seamless process integration. IMEC's considerable device experience will blend together very well with Aixtron's substantial process experience. Through this partnership we look forward to creating a considerable asset for the Duallogic project".
Other partners include IMEC, NXP Semiconductors N.V., The Katholieke Universiteit Leuven in Belgium; Commissariat à l'Énergie Atomique (LETI), STMicroelectronics in France; The University of Glasgow in the United Kingdom; and IBM Research GmbH in Switzerland.
The project aim is the development of a dual channel CMOS technology comprising high channel mobility Ge pMOS and III-V compound semiconductor nMOS transistors co-integrated on the same complex engineered substrate on silicon. This will provide a considerable performance boost option for prospective 22nm geometry technology and a major competitive advantage for the European nanoelectronics industry.
"By mobilizing Europe's major technology development laboratories along with leading players from the IT industry, semiconductor and key semiconductor equipment manufacturers, this project will be a catalyst to furthering competence in manufacturing and IP in Europe," comments Dr. Athanasios Dimoulas, National Center for Scientific Research DEMOKRITOS.
"As part of the Duallogic team Aixtron will deliver a cluster tool for III-V devices," says Prof. Dr. Michael Heuken, Aixtron's Vice President Corporate Research and Development. "This will be installed at IMEC's state of the art cleanroom facility in Belgium. Aixtron researchers will be working closely with IMEC staff to achieve seamless process integration. IMEC's considerable device experience will blend together very well with Aixtron's substantial process experience. Through this partnership we look forward to creating a considerable asset for the Duallogic project".
