News Article
Double patterning for 22nm more promising
JSR introduces new lithography materials that appear effective for 22nm
JSR announced that it has achieved 32nm line and space patterns for 22nm node semiconductor devices by using a new "freezing material" for double patterning. The results were presented at the "SPIE advanced lithography 2008" technical conference held February 24-28. Double patterning, such as double exposure/double etch or double exposure/single etch, are promising methods for processes at the 22nm node. JSR has developed its new "freezing material" for the double exposure/single etch process to achieve finer pitches. JSR worked with IMEC (Europe's independent research centre) for the evaluation. JSR's "freezing material" is designed to prevent the first resist material from mixing into the solvent of the second resist material by hardening the surface of the first resist material. By using this material, it may make the most wanted double patterning process achievable. This evaluation was conducted within IMEC's advanced lithography industrial affiliation program (IIAP) as part of IMEC's (sub-) 32nm CMOS research platform, which is IMEC's premium R&D co-operation platform focused on research and development for 32nm - 22nm logic LSI, memory devices semiconductor manufacturing. All evaluation is taken place at IMEC's facilities. In addition to JSR's freezing material for double patterning, the company's photoresists, topcoat materials and non-topcoat resists for immersion lithography are being used in this program and are showing promising results for mass production processes.
