News Article
TSMC unveils new 40/65-Nm SPICE tool qualification programme
Increases SPICE modelling accuracy and simulation performance for high performance chip designs
Taiwan Semiconductor Manufacturing Company unveiled at its opening 2008 Technology Symposium a comprehensive SPICE tool qualification programme that drives its Design Service ecosystem partners to develop SPICE simulators with greater accuracy and higher performance.
Targeting TSMC’s 65 - 40 nm and smaller geometry process technologies, the programme’s benefits include improved device model accuracy, enhanced simulation efficiency, and compatibility across a wide selection of qualified SPICE simulators. The program also improves simulation accuracy, shortens transistor level simulation cycle time, increases simulation capacity, and ultimately enables faster time-to-market and first time silicon success.
To address emerging nanometre effects associated with the 40nm technology and beyond, the company is introducing iSDK, interoperable SPICE Design Kit, together with the TSMC’s Model Interface (TMI), a new device modelling innovation and simulation performance improvement. Written in standard C language, iSDK with TMI is a new method for compact SPICE device modelling that is an addition to the traditional, and slower macro modelling approach. TSMC will provide iSDK through a common compiled shared library that will link directly to a vendors’ SPICE simulators.
Once the SPICE simulator passes SPICE tool qualification TSMC will post a qualification report on TSMC-Online, the company’s customer only portal. Multiple EDA partners are already participating in the programme including Agilent Technologies, Berkeley Design Automation, Cadence, Magma, Mentor, Simucad, and Synopsys.
“TSMC is the first foundry to deliver on the commitment of providing more design accuracy by proactively working with multiple EDA vendors to create and qualify interoperability between SPICE simulation technologies and the foundry’s most advanced processes technologies,” said S.T. Juang, senior director, Design Infrastructure Marketing at TSMC.
“Going beyond the traditional tool qualification program, TSMC’s Modelling Interface architecture sets a new standard in SPICE modelling accuracy and simulation efficiency. The programme provides designers the ability to select qualified SPICE simulators to match their design needs, improve compliance with TSMC processes, and ensure design accuracy for first time silicon success,” he explained.
