News Article
New ultra low power FPGA
SiliconBlue pioneers new FPGA technology for handheld, ultra low power applications, non volatile FPGA on 65nm low power process
The company announced a new class of single chip, ultra low power FPGA devices, that set a new industry standard for price, power and space along with unprecedented ASIC like logic capacity for battery powered, handheld consumer applications. Manufactured on TSMC’s 65nm low power (LP) standard CMOS process, the new single chip iCE family of FPGAs incorporate the company’s proprietary NonVolatile Configuration Memory (NVCM) technology, eliminating external flash PROM costs while making it easy to use.
“We are introducing the first new FPGA technology in ten years, allowing us to build from the ground up single chip, reprogrammable, ultra low power FPGAs,” said Kapil Shankar, CEO of SiliconBlue. “Our two process generation lead, gives our customers an unprecedented two to five times price advantage over competing non volatile PLDs. We have delivered all the capabilities and advantages of wall plugged consumer FPGAs to battery powered handhelds today.”
According to Semico Research, handheld applications are a rapidly growing market for programmable logic as sales in these applications are forecasted to be over US$650 million by 2010. SiliconBlue’s products are optimised for smart phones, portable media players (PMPs), digital still cameras (DSCs), mobile internet devices (MIDs), personal navigation devices (PNDs), handheld point of sale (POS) systems, medical instruments, Edu toys and flash camcorders.
Rich Wawrzyniak, Senior Analyst at Semico, said, “Power and cost have been issues from very early on in the programmable logic industry. Despite efforts to improve in these areas, traditional FPGA solutions, for the most part, do not meet handheld requirements for power or cost. SiliconBlue’s technology positions them to deliver an unprecedented combination of power, price and performance to designers who want to use programmable logic but have not because power was too high or performance was too low.”
“SiliconBlue has attracted an incredibly skilled team of PLD experts, who have been instrumental in developing and patenting many of the leading programmable logic technologies. Their experience comes from industry leaders such as Xilinx, Altera, AMD, LSI Logic, and Intel. This skilled team has enabled SiliconBlue to establish ultra low power technology and process leadership, compared to competing FPGAs trapped on lagging process nodes,” said Rich Sevcik, former Executive Vice President, Xilinx, and current member of the board for SiliconBlue.
SiliconBlue is the first company to combine low power, NVCM and standard SRAM technologies at the 65nm LP process node. Fabricated at TSMC, the process is scalable to 40nm and beyond. SiliconBlue’s FPGAs carry their own non volatile configuration memory on chip for storing configuration data; therefore there is no need for the external flash PROM employed by traditional FPGA solutions. This saves part count, space, cost and removes the threat of bitstream snooping, resulting in secure designs.
Compared to existing non volatile FPGAs, which employ embedded flash technology on two generations old 0.18μ / 0.13μ processes, the iCE FPGAs on 65LP process offer unprecedented ASIC like logic capacity and deliver the industry’s lowest logic cost.
The 65nm LP process, coupled with SiliconBlue’s proprietary low power design delivers more usable logic per unit of cost, lower standby power and lower active power than competing programmable logic products. SiliconBlue uses the same definitions for power modes as handset designers: Operating (active fast, ~MHz) and Standby (active slow, ~kHz) SiliconBlue’s FPGAs remain operating, consuming less standby power than other products which require complex power down sleep modes. Active power remains low through a combination of 65LP process, proprietary chip design and operating the logic core as low as 1.0 volt.
“We are introducing the first new FPGA technology in ten years, allowing us to build from the ground up single chip, reprogrammable, ultra low power FPGAs,” said Kapil Shankar, CEO of SiliconBlue. “Our two process generation lead, gives our customers an unprecedented two to five times price advantage over competing non volatile PLDs. We have delivered all the capabilities and advantages of wall plugged consumer FPGAs to battery powered handhelds today.”
According to Semico Research, handheld applications are a rapidly growing market for programmable logic as sales in these applications are forecasted to be over US$650 million by 2010. SiliconBlue’s products are optimised for smart phones, portable media players (PMPs), digital still cameras (DSCs), mobile internet devices (MIDs), personal navigation devices (PNDs), handheld point of sale (POS) systems, medical instruments, Edu toys and flash camcorders.
Rich Wawrzyniak, Senior Analyst at Semico, said, “Power and cost have been issues from very early on in the programmable logic industry. Despite efforts to improve in these areas, traditional FPGA solutions, for the most part, do not meet handheld requirements for power or cost. SiliconBlue’s technology positions them to deliver an unprecedented combination of power, price and performance to designers who want to use programmable logic but have not because power was too high or performance was too low.”
“SiliconBlue has attracted an incredibly skilled team of PLD experts, who have been instrumental in developing and patenting many of the leading programmable logic technologies. Their experience comes from industry leaders such as Xilinx, Altera, AMD, LSI Logic, and Intel. This skilled team has enabled SiliconBlue to establish ultra low power technology and process leadership, compared to competing FPGAs trapped on lagging process nodes,” said Rich Sevcik, former Executive Vice President, Xilinx, and current member of the board for SiliconBlue.
SiliconBlue is the first company to combine low power, NVCM and standard SRAM technologies at the 65nm LP process node. Fabricated at TSMC, the process is scalable to 40nm and beyond. SiliconBlue’s FPGAs carry their own non volatile configuration memory on chip for storing configuration data; therefore there is no need for the external flash PROM employed by traditional FPGA solutions. This saves part count, space, cost and removes the threat of bitstream snooping, resulting in secure designs.
Compared to existing non volatile FPGAs, which employ embedded flash technology on two generations old 0.18μ / 0.13μ processes, the iCE FPGAs on 65LP process offer unprecedented ASIC like logic capacity and deliver the industry’s lowest logic cost.
The 65nm LP process, coupled with SiliconBlue’s proprietary low power design delivers more usable logic per unit of cost, lower standby power and lower active power than competing programmable logic products. SiliconBlue uses the same definitions for power modes as handset designers: Operating (active fast, ~MHz) and Standby (active slow, ~kHz) SiliconBlue’s FPGAs remain operating, consuming less standby power than other products which require complex power down sleep modes. Active power remains low through a combination of 65LP process, proprietary chip design and operating the logic core as low as 1.0 volt.
