News Article
Siltronic and Qimonda jointly research basics of new transistor technology
Both companies co-operate on research into silicon based
materials for 3 dimensional transistors.
The project, supported by the German federal government for
education and research, will involve Siltronic and Qimonda to jointly research
the fundamentals of integrated electronic components for the generation after
next. For example: DRAM memory.
The idea is to strengthen the technological and economic competence of Saxony in Germany, particularly the semiconductor industry and material science. The so called ‘high tech’ strategy of the local government tries to enable co-operation of companies at an early stage and hence being at a pole position within the market. This would increase the chances for companies in this area to compete within the market.
Future generation electronic components will see a transition from two to three dimensional transistors. This could enhance higher performance as well as less energy consumption. The overall sizes would also shrink.
As a target the project seeks to establish an understanding of the requirements of the characteristics of an silicon wafer and to fine tune the establishment of 3D transistors.
Furthermore, new processes need to be developed for future generation wafers and 3D transistors since the requirements necessary are still not established. i.e. The planarity of a wafer, etc.
The idea is to strengthen the technological and economic competence of Saxony in Germany, particularly the semiconductor industry and material science. The so called ‘high tech’ strategy of the local government tries to enable co-operation of companies at an early stage and hence being at a pole position within the market. This would increase the chances for companies in this area to compete within the market.
Future generation electronic components will see a transition from two to three dimensional transistors. This could enhance higher performance as well as less energy consumption. The overall sizes would also shrink.
As a target the project seeks to establish an understanding of the requirements of the characteristics of an silicon wafer and to fine tune the establishment of 3D transistors.
Furthermore, new processes need to be developed for future generation wafers and 3D transistors since the requirements necessary are still not established. i.e. The planarity of a wafer, etc.
