News Article
ESI introduces picosecond laser based solution for wafer singulation
The
system provides process capabilities for advanced wafer processes.
Electro Scientific Industries, a
provider of photonic and laser systems for micro engineering
applications, introduced a laser based system for wafer singulation.
The system utilises ESI’s patented technology and includes a
picosecond, ultra fast laser to enable fully automated wafer scribing
and full cut dicing, on a variety of processes, and provides high
performance and high yields. Production shipments of the system are
expected to begin during the Company’s third fiscal 2009 quarter.
Trends in the mobile and consumer electronics markets are driving the semiconductor industry to supply three dimensional (3D) stacked packages for greater performance and form factor needs. 3D stacked packages typically contain memory, logic and other complex semiconductor devices which have been reduced in thickness to 100 microns or less. These thinner semiconductor devices are becoming increasingly difficult to effectively singulate with conventional dicing and scribing technologies. Also, these high performance devices typically incorporate low-K dielectrics and copper (Cu) interconnects that create additional challenges to the singulation process. Cignis was designed to specifically address all of these issues.
“Cignis will be used to remove low-K dielectrics and to singulate wafers, protecting the wafer’s overall die break strength and reducing damage from the heat affected zone,” commented Martin Igarashi, director of semiconductor products group at ESI. “As the semiconductor assembly process becomes more complex, we believe that our unique capabilities of the Cignis system technology will be employed to enable future wafer assembly requirements and lower overall operating costs. The success of this technology very likely will lead to rapid global adoption at leading assembly factories worldwide.”
Trends in the mobile and consumer electronics markets are driving the semiconductor industry to supply three dimensional (3D) stacked packages for greater performance and form factor needs. 3D stacked packages typically contain memory, logic and other complex semiconductor devices which have been reduced in thickness to 100 microns or less. These thinner semiconductor devices are becoming increasingly difficult to effectively singulate with conventional dicing and scribing technologies. Also, these high performance devices typically incorporate low-K dielectrics and copper (Cu) interconnects that create additional challenges to the singulation process. Cignis was designed to specifically address all of these issues.
“Cignis will be used to remove low-K dielectrics and to singulate wafers, protecting the wafer’s overall die break strength and reducing damage from the heat affected zone,” commented Martin Igarashi, director of semiconductor products group at ESI. “As the semiconductor assembly process becomes more complex, we believe that our unique capabilities of the Cignis system technology will be employed to enable future wafer assembly requirements and lower overall operating costs. The success of this technology very likely will lead to rapid global adoption at leading assembly factories worldwide.”
