Loading...
News Article

Arteris joins Intel Foundry Accelerator Ecosystem Alliance Program

News

Arteris, a leading provider of system IP which accelerates system-on-chip (SoC) creation, has joined Intel Foundry Accelerator Ecosystem Alliance Program, as a member of both the IP Alliance and the recently announced Chiplet Alliance.

This collaboration will help mutual customers design electronics using Intel Foundry’s advanced process technologies. In addition, it will also support increased interoperability and the advancements beyond traditional node scaling by growing the chiplet ecosystem.



Through these alliances, Arteris joins forces with Intel Foundry to empower engineering teams to achieve their design goals, optimize performance, power, and area (PPA), and stay on schedule when designing complex SoCs and chiplets. Driven by customer demand, Arteris will leverage its physically aware network-on-chip (NoC) IP and SoC integration automation technologies to ensure the design and integration of high-bandwidth, low-latency, power-efficient interconnects used as the data backbone across IPs in SoCs and interoperable multi-die systems implemented using Intel Foundry’s advanced semiconductor process technologies.



"Intel Foundry is pleased to welcome Arteris, a pioneer of NoC IP technology used in a broad range of applications, to our Intel Foundry Accelerator Ecosystem Alliance," said Suk Lee, VP & GM of Ecosystem Technology Office, Intel Foundry. "By leveraging our advanced foundry technology capabilities through our IP and Chiplet Alliance programs, Arteris can further optimize its physically aware and highly interoperable NoC IPs used in SoCs and chiplets, accelerating backend convergence, interoperability, and silicon deployment to help drive success for our joint customers."



“Our collaboration with Intel Foundry exemplifies Arteris’ dedication to helping customers achieve the best performance, shortest wire length with the lowest power, and smallest area possible on the most advanced silicon nodes,” said K. Charles Janac, president and CEO of Arteris. “By optimizing our NoC IP technologies and by providing interoperability in the chiplet ecosystem, we continue to enable designers to deliver on their PPA targets, IP and chiplet integration, and to meet project schedules.”

Arteris joins Intel Foundry Accelerator Ecosystem Alliance Program
Northeast Microelectronics Coalition Hub launches $10m SCALE Capital Program
Wet processing platform picked for advanced packaging
Intel shares technology roadmap
xMEMS extends µCooling Fan-on-a-Chip technology to AI data centres
Laser annealing platform the logic choice
Imec coordinates EU Chips Design Platform
Microchips: EU off the pace in a global race
Microchips: EU off the pace in a global race
Hiden Analytical launches EP-Replayer
Innovative approaches to scaling network-on-chip architectures
Drip by drip: semiconductor water management innovations
The geopolitics of the semiconductor industry: navigating a global power struggle
Vacuum systems: a guide to turnkey projects
Smarter by design: how AI is reshaping manufacturing in 2025
Biometric ID drives semiconductor manufacturing security and efficiency
Critical Manufacturing and Twinzo partner
Infineon at PCIM Europe 2025
Renesas debuts new Group in popular RA0 Series
Trump’s semiconductor tariffs threaten to affect US medical device industry growth
Arteris wins two Gold and One Silver Stevie Awards
2025 IEEE ECTC highlights microelectronics packaging and component breakthroughs
The Northeast Microelectronics Coalition awards $1.43 million to 19 semiconductor companies
Smart and compact sensors with Edge-AI
TechInsights appoints Dan Kim as Chief Strategy Officer
Infineon introduces 'powerful and energy-efficient' IGBT and RC-IGBT devices for electric vehicles
Applied Materials makes strategic investment in BE Semiconductor Industries
AMD achieves first TSMC N2 product silicon milestone
Yokogawa Test & Measurement releases AQ2300 Series Optical Power Meter Modules
CE3S introduces Millice StripAid X Series
IDTechEx explores emerging applications for PICs
Miniature hexapod designed for demanding applications
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
x
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: