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TYLsemi raises $43 million

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First production-ready chiplet portfolio spanning connectivity, power, and memory for XPUs.

TYLsemi™ has emerged from stealth and announced the closing of an oversubscribed $43 million early-stage funding round to accelerate the development of AI infrastructure. TYLsemi is the first chiplet platform company to deliver a full portfolio across IO, power delivery, and memory paired with a chiplet-based custom silicon design, integration and supply-chain ownership. This standards-based, production-ready portfolio will provide AI infrastructure customers with a faster, lower-risk path for developing AI silicon from architecture to deployment.

The funding round was led by Matter Venture Partners with participation from Viola Ventures, GHOVC, Egis Technology, and strategic investment from leading companies across the global semiconductor and AI infrastructure ecosystem. The company was co-founded by industry leaders Mohit Gupta and Sunil Bhardwaj, who have led and scaled businesses and worldwide engineering and operations teams at Alphawave (acquired by Qualcomm), SiFive, Cadence Design Systems, Rambus, and other leading semiconductor companies.

“The AI accelerator market is on track to reach $604 billion by 2033 and custom silicon XPUs built for specific hyperscaler workloads are the fastest-growing segment,” said Mohit Gupta, Founder and CEO of TYLsemi. “At that scale, chiplet-based design is no longer optional, yet there is no pure-play chiplet company serving this market with a full portfolio. TYLsemi closes that gap with standards-based chiplets combined with UCIe-based die-to-die connectivity, XPU-aware design, packaging, and integration — giving customers a fast, proven path to AI-era silicon.”

Chiplets are the New Standard for AI Silicon

AI systems are shifting from monolithic chips to distributed, multi-die architectures as chip size approaches physical limits and connectivity and power become bottlenecks. At the same time, advances in packaging technologies are making it possible to integrate multiple dies into a single system. With the emergence of standardized interconnects such as UCIe, chiplet-based design is now practical and scalable.

“AI infrastructure is undergoing a fundamental shift toward modular, chiplet-based design, but the ecosystem has not kept pace,” said Jim Handy, General Director at Objective Analysis. “This represents a significant opportunity for a company such as TYLsemi that can deliver pre-validated, standards-based silicon to accelerate AI infrastructure silicon deployment.”

TYLsemi Makes Chiplet-Based AI Systems Practical at Scale

TYLsemi delivers a reusable production-ready chiplet portfolio that simplifies the design of multi-die AI systems. Customers can use these chiplets as standalone components or as the foundation for full custom silicon solutions based on leading industry foundry and packaging technologies. Below are the first chiplets that TYLsemi will bring to market, with more planned in the future to meet the evolving needs of AI infrastructure customers.

  • TYL.IO™: Versatile connectivity chiplet product family for AI systems
    Comprehensive family of IO chiplets designed to enable high-bandwidth, standards-based connectivity across high-performance systems supporting PCIe, ESUN, and UALink connectivity today, with a co-packaged optics (CPO) roadmap for next-generation rack-scale fabrics.
  • TYL.Power™: Intelligent in-package power delivery solution for XPUs
    An integrated voltage regulator (IVR) chiplet that provides efficient and intelligent control and optimized system-level power efficiency
  • TYL.Mem™: Versatile memory connectivity product family for AI systems.
    A planned product family focused on memory connectivity for advanced AI systems, with additional details to be announced as the roadmap progresses.
  • TYL.ForgeSM: End-to-end chiplet-enabled custom silicon platform
    A full-stack platform for customer-defined XPU, compute, and fabric designs, which TYLsemi implements using its connectivity and power delivery portfolio, plus IP, foundry, packaging, and production readiness.

TYL.IO and TYL.Power chiplet samples will be available to qualified customers in 2027 in partnership with TSMC; TYLsemi is now engaging lead customers for its TYL.Forge platform.

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