Arteris collaborates with IC-Link by imec
Arteris has announced a collaboration with IC-Link by imec, imec’s design and manufacturing service provider for ASICs and silicon photonics. Arteris NoC IP will be deployed as part of the ongoing effort to accelerate and simplify the development of next-generation AI and high-performance computing (HPC) chiplets and application specific integrated circuits (ASICs). By combining its subsystem expertise with Arteris NoC IP technology, IC-Link is helping customers reduce infrastructure development effort, improve design reuse, and accelerate delivery of increasingly complex custom semiconductor platforms.
As AI and HPC systems continue to increase in scale and complexity, engineering teams are looking for new ways to improve productivity and focus resources on innovation, rather than repeatedly rebuilding foundational infrastructure. By combining its subsystem expertise with Arteris technology, IC-Link provides a reusable, scalable architecture that helps customers reduce integration complexity, lower development risk, and accelerate development of next-generation custom silicon.
"As semiconductor complexity continues to grow, including in AI ASICs, engineering teams increasingly need ways to reuse proven infrastructure and focus their efforts on high-performance differentiation," said K. Charles Janac, president and CEO of Arteris. "The collaboration between IC-Link by imec and Arteris reflects a broader industry shift toward reusable architectures that help improve productivity, reduce risk, and accelerate innovation across AI and HPC semiconductor development."
“IC-Link’s high-speed I/O subsystem reference design represents a significant step forward in how ASIC developers targeting high-performance computing and artificial intelligence applications address the challenges of advanced node design,” said Ozgur Gursoy, director of portfolio and strategy for ASICs at IC-Link. “With each new technology node, design teams typically face costly and time-intensive rework of their I/O subsystems. By integrating Arteris’ industry-leading network-on-chip IP, our reference design reduces risk and enables HPC and AI teams to focus on what matters most: optimizing the accelerator core.”
