+44 (0)24 7671 8970
More publications     •     Advertise with us     •     Contact us
News Article

Mass does not equal weight

Adrian Kiermasz, PhD of Metryx explores the challenges for metrology and introduces mass metrology as a method for productivity and yield management.
From a technological perspective, being a part of the semiconductor industry has never been more interesting. Over the next few years we will enter an age where some say Moore’s Law will soon reach the end of its natural life, where 3D integration will be prominent and many new types of device will be looming on the horizon, eager to take over where the planar transistor (eventually) fizzles out. Also, let’s not forget the discussions on moving to 450mm wafers, the predicted arrival of $10Bn monster Fabs and of course the incredible demand for NAND Flash memory. Even so, whatever the device type or wafer size there are two things that always remain constant: The ever increasing demand for the latest leading edge devices to be brought to market more quickly and manufactured more cost effectively; and the process repeatability of each step in the device manufacturing sequence is paramount to the success of both productivity and yield. The metrology challenge In a production environment, the challenge for metrology is to address the two key points highlighted above. Reduce the cycle time for the latest devices to reach the market and improve the productivity and yield. There are many different types of metrology, both technically and also from an applications target perspective. Fundamentally however, all metrology performs the same function, in that it provides information on a given process for the end user to make an informed decision on what to do next. Whether in production or R&D and from stress measurement to defectivity monitoring, the end result provided by the metrology tool should give an output which makes a difference, even if that decision is for the end user to do nothing because everything is as expected. The difference is that the end user now knows the process is running correctly compared to assuming the process is running correctly. If the metrology tool does this, then it adds value. So, how complex does this output have to be? Is the cliché true that a complex problem requires a complex solution? There are of course many different processes being run to manufacture many different device types and, in an ideal case, the metrology must be able to provide instant feedback on the process performance. Test wafers can be made to resemble product wafers, but the more they resemble the actual product wafer the more expensive they become and the more cost they add to the manufacturing device flow. Ideally, the metrology should be able to provide instant process performance feedback on the actual product wafers, providing reliable information on whether the process was successful or not. This saves both cost and redundant measurement time associated with test wafers. There are of course a variety of problems with using metrology techniques on product wafers, not least damage to the wafer, utilisation of expensive wafer real estate or added cost and complexity in making test features. Metrology is required to perform two functions. Firstly, in the manufacturing process the metrology must identify a process problem quickly and cost effectively on the product wafer when it occurs. This function is paramount to both save scrap and yield loss. Secondly, when a problem has been identified, metrology must aid the problem solving process and help the user to understand the problem and identify root cause. In this way a solution can be implemented as fast as possible. These two functions need not be in the same metrology tool and in fact combining the two features will most likely not provide the most cost effective solution. Figure 1 explains the trade off between product risk and metrology cost. The best solution would be for a high throughput costeffective metrology tool to monitor critical processes and immediately highlight when a problem occurs. Identifying the root cause would almost certainly involve using a variety of different analytical techniques, including other metrology tools with varied functionality. This methodology allows higher sample rate of critical process wafers and a reduction in product risk, preventing wafer scrap and potential yield issues. Utilizing the two types of metrology will produce an overall more Fab-wide cost effective solution and the ability to sample critical process steps at a higher rate. Metryx proposes such a cost effective solution by using mass metrology as a inline tool for identifying problems on product wafers when and where they occur. Then more expensive, slower, complex metrology which might not be suitable for product wafers can be used to help the user analyse the problem and implement a solution. Each process step has a unique mass change. It has been shown (references 1-7) that this unique mass change is a direct representation of process performance. Mass and weight are not equivalent. In the extreme, if a silicon wafer were to be put into orbit, it would still have a mass but its weight would be zero. When determining the weight of an object, there are internal and external factors which will limit the reliability of the reading. External factors include atmospheric buoyancy, temperature, gravity etc and internally the scale is subject to internal frictional forces and errors. Although a typical scale may provide a very reasonable measurement of weight at the precise time the measurement is taken, the weight of the object will continue to vary over time and the next time the weight is measured it will be different. Metryx uses proprietary technology, enabling a direct reading of Mass (not weight!) with atomic level resolution, allowing material changes in the Ångström range to be detected. The variation in weight for a typical blank 300mm silicon wafer measured 30,000 times over a 9 month period is shown in figure 2. The weight varies a considerable amount, but the mass is constant to within a 1σ error of 80μg. Given this mass measurement error, what levels of process change can mass predict? The best way to describe this is by material thickness change, as this is a more common measurement for semiconductor processing. Given the equation: Mass = volume x density, the thickness error associated with a mass measurement change of 80μg depends on the density, the thickness change and the surface area. For a typical BEoL TaN barrier layer, an 80μg mass change is less than a 0.1nm change in thickness on 300mm wafers. This enables unprecedented measurement repeatability for the most sensitive of process changes. Mass Metrology All devices are manufactured by adding or removing materials. Each process step creates a unique mass change and measuring this change provides a fingerprint of the process performance (references 1-7). Any process, performing within the defined process window has fluctuations. These fluctuations will manifest as a normal mass distribution and the spread of the distribution will be a direct representation of the process performance. Let’s assume a deep silicon etch process is running in production as in figure 3. If the process fails it will fail in one of two ways: either the process will drift until something which is measured falls outside of its specification (analogue failure), or there will be a sudden failure (digital failure). There are many measureable parameters which might fail during an etch process which include, depth, uniformity, CD, selectivity and profile to name a few. Mass change will encompass a change to any of these parameters listed within its normal distribution. In figure 3, it can be seen that the mean mass change is shifting gradually downwards. In this particular process this is indicative of an etch rate variation due to polymer build up in the chamber. Following a chamber clean, there is an outlier, again indicated by mass change, indicating the first wafer is out of specification. Measuring and monitoring mass change is an accurate and effective way of providing a process health check. Table 1 highlights some key advantages of using mass as a production metrology tool. Applications New nodes invite new material measurement challenges and the need to ramp product quickly. A major problem is the investment in metrology equipment to be able to measure these complex steps efficiently and cost effectively, on the actual product wafer. Mass metrology is being used worldwide in 300mm volume production, for a variety of advanced process applications, to do exactly this. Because all processes undergo a mass change, mass metrology has complete flexibility being able to measure (essentially) every process step in the manufacturing sequence. An advanced Shallow Trench Isolation (STI) module provides a good example of how mass metrology can be used to monitor a complete process. During the STI module the complete process was monitored and measured using mass metrology. For expediency the following steps will be discussed: 1. Pad Oxide/ Nitride deposition 2. STI dry etch, Photo resist ashing and wet strip 3. HF dip for top corner rounding 4. Clean, liner oxidation and High Aspect Ratio fill Figure 4 shows the mass results for the Pad Oxide/ Nitride stack deposition over a few hundred wafers. It can be seen the process is very well controlled. The process is performing within its control limits and there are no major process issues. Consider now Figure 5, which shows a reduction in mass or negative mass change. The measurement was taken after the STI etch, photoresist strip and wet strip had been carried out. There is clearly a variation through the 25 wafer lot, which was found to be caused by insufficient wet clean processing, leaving polymers in the trenches. This would not have been picked up by any other method and the polymer left in the trenches would have a detrimental effect on the subsequent HF dip, which provides top corner rounding, vital for transistor performance. Mass metrology was sensitive enough to provide insight into whether the top corner rounding process was working correctly. Failure here would have disastrous effects on device performance. Top corner rounding process success can normally only be determined at electrical testing, but the resolution of mass metrology is able to provide immediate feedback at the process stage on the device/ product wafer. This could prevent a large amount of scrap because a problem is identified at this stage and not left until the devices are tested. These 25 wafers can also be seen in Figure 6 which shows the STI Etch after suitable process corrections were employed. Figure 6, provides data which shows there are still other process control issues. For example incomplete polymer removal and a lithography problem were easily highlighted on product wafers by using mass metrology. The final data to be presented is from the high aspect ratio gap fill process. For advanced STI processes the gaps are getting narrower and deeper, hence more difficult to fill. How much confidence does an engineer have that the gaps have been filled correctly with no voids? The change in mass caused by the oxide gap fill is a direct representation of the material deposited. The mass resolution is such that the manufacturing engineer can have complete confidence that provided the mass distribution is within the control window, the deposition process is within specification. Figure 7 shows the mass increase produced from a liner oxidation and high aspect ratio deposition. It can be seen that process deposition errors were identified on the actual product wafers on several occasions. Using mass metrology to evaluate and monitor the complete STI module enabled a number of key process errors to be identified on the product wafers. Using mass metrology to carry out a quickcheck measurement methodology to indicate that the process is running correctly eliminates any concerns that an electrical test further down the line will provide unwelcomed data, which could result in short-loops, test wafers and valuable time being wasted; not to mention the scrapped product wafers. Table 2 provides a sample of some of these applications, although in principle the mass change can be tracked through the complete device flow. Mass metrology is being used as a complementary measurement to the existing Fab metrology equipment, saving cost and wasted time. Conclusions Measuring and monitoring process performance using mass metrology while completely innovative, has been accepted and adopted in 300mm volume production environments for SPC of many advanced processes. The capability to monitor the process performance of any process on 300mm product wafers with an increased sampling rate enables product risk to be significantly reduced. This provides less scrap and improved yields. REFERENCES: 1. Applications of mass metrology in advanced device manufacture ASTS, Beijing China, May 2007 2. Cost effective SPC/ APC monitoring of a film’s dielectric EuroAsia Semiconductor, October 2006 3. Mass metrology for controlling and understanding processes ISSM, Santa Clara CA USA, October 2007 Deep trench metrology challenges for 75nm DRAM technology 4. Fabtech, 32nd Edition, Q4 2006 5. Characterization and in-line monitoring of low-k porogen formation SST, December 2007 6. Non contact metal cap thickness metrology on patterned wafers VMIC, Santa Clara, CA, USA, September 2006 7. Determining dielectric constant variation of SiOC Low k Films using density measurement, AMC USA, September 2005 ACKNOWLEDGEMENTS Metryx would like to acknowledge the commitment and work of IMEC to the mass metrology program
Outsourcing facility for India
GigaDevice signs distribution agreement with EKOM
EU Consortium accepting Edge-AI design proposals
Airspace expands presence in Asia
IntraAction unveils AOD for Advanced EUV applications
Tata Group to build India’s first indigenous facility in Assam
Taiwan Semiconductor introduces 400V/600V ESD Withstand-Capable Rectifiers
Infineon introduces new Solid-State Isolators
Nexperia broadens its range of discrete FET solutions at APEC 2024
Imec presents levers to reduce the CO2 equivalent footprint of lithography and etch
Imec demonstrates readiness of the High-NA EUV patterning ecosystem
Infineon reorganizes sales and marketing
Imec introduces compact wireless powering technology
HCLTech and Intel Foundry expand collaboration
Imec pioneers low-power UWB receiver chip
SEALSQ post-quantum semiconductors to bridge the AI divide
Samsung Electronics collaborates with Arm
Department of State and ASU reveal new initiative
New Wooptix Poster at SPIE Advanced Lithography and Patterning
Renesas develops Embedded MRAM Macro
Intel launches Systems Foundry designed for the AI era
Imec unveils 'Breakthrough' ADC architecture
Infineon introduces the OPTIGA Trust M MTR
Nordic Semiconductor expands nRF91 Series with nRF9151 SiP
Tiny power converters run on vibrational energy
Cadence and Intel Foundry collaborate
Infineon sells manufacturing sites
Renesas develops AI accelerator
Mouser Electronics promotes Wearables Resource Centre
DuPont to showcase materials innovation for EUV lithography
Wafer-level Integration Changes of ALD for 2D Materials
CEA-Leti develops novel architecture for Keyword-Spotting
Search the news archive

To close this popup you can press escape or click the close icon.
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.

Please subscribe me to:


You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: